This commit is contained in:
Tiberiu Chibici 2021-09-14 18:35:13 +03:00
parent 4e5c38d0ff
commit f052f2294e
32 changed files with 525 additions and 522 deletions

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@ -1,292 +0,0 @@
00000000000i[ ] Bochs x86 Emulator 2.4.5
00000000000i[ ] Build from CVS snapshot, on April 25, 2010
00000000000i[ ] System configuration
00000000000i[ ] processors: 1 (cores=1, HT threads=1)
00000000000i[ ] A20 line support: yes
00000000000i[ ] CPU configuration
00000000000i[ ] level: 6
00000000000i[ ] SMP support: no
00000000000i[ ] APIC support: yes
00000000000i[ ] FPU support: yes
00000000000i[ ] MMX support: yes
00000000000i[ ] 3dnow! support: no
00000000000i[ ] SEP support: yes
00000000000i[ ] SSE support: sse2
00000000000i[ ] XSAVE support: no
00000000000i[ ] AES support: no
00000000000i[ ] MOVBE support: no
00000000000i[ ] x86-64 support: yes
00000000000i[ ] 1G paging support: no
00000000000i[ ] MWAIT support: no
00000000000i[ ] VMX support: no
00000000000i[ ] Optimization configuration
00000000000i[ ] RepeatSpeedups support: yes
00000000000i[ ] Trace cache support: yes
00000000000i[ ] Fast function calls: yes
00000000000i[ ] Devices configuration
00000000000i[ ] ACPI support: yes
00000000000i[ ] NE2000 support: yes
00000000000i[ ] PCI support: yes, enabled=yes
00000000000i[ ] SB16 support: yes
00000000000i[ ] USB support: yes
00000000000i[ ] VGA extension support: vbe cirrus
00000000000i[MEM0 ] allocated memory at 027B0020. after alignment, vector=027B1000
00000000000i[MEM0 ] 32.00MB
00000000000i[MEM0 ] mem block size = 0x00100000, blocks=32
00000000000i[MEM0 ] rom at 0xe0000/131072 ('BIOS-bochs-latest')
00000000000i[MEM0 ] rom at 0xc0000/40448 ('VGABIOS-lgpl-latest')
00000000000i[CMOS ] Using local time for initial clock
00000000000i[CMOS ] Setting initial clock to: Sat Jul 03 09:26:48 2010 (time0=1278138408)
00000000000i[DMA ] channel 4 used by cascade
00000000000i[DMA ] channel 2 used by Floppy Drive
00000000000i[FDD ] fd0: 'ctaos.img' ro=0, h=2,t=80,spt=18
00000000000i[PCI ] 440FX Host bridge present at device 0, function 0
00000000000i[PCI ] PIIX3 PCI-to-ISA bridge present at device 1, function 0
00000000000i[MEM0 ] Register memory access handlers: 0x000a0000 - 0x000bffff
00000000000i[WGUI ] Desktop Window dimensions: 1366 x 768
00000000000i[WGUI ] Number of Mouse Buttons = 5
00000000000i[WGUI ] IME disabled
00000000000i[MEM0 ] Register memory access handlers: 0xe0000000 - 0xe0ffffff
00000000000i[CLVGA] VBE Bochs Display Extension Enabled
00000000000i[CLVGA] interval=50000
00000000000i[ ] init_dev of 'unmapped' plugin device by virtual method
00000000000i[ ] init_dev of 'biosdev' plugin device by virtual method
00000000000i[ ] init_dev of 'speaker' plugin device by virtual method
00000000000i[ ] init_dev of 'extfpuirq' plugin device by virtual method
00000000000i[ ] init_dev of 'gameport' plugin device by virtual method
00000000000i[ ] init_dev of 'pci_ide' plugin device by virtual method
00000000000i[PCI ] PIIX3 PCI IDE controller present at device 1, function 1
00000000000i[ ] init_dev of 'acpi' plugin device by virtual method
00000000000i[PCI ] ACPI Controller present at device 1, function 3
00000000000i[ ] init_dev of 'ioapic' plugin device by virtual method
00000000000i[IOAP ] initializing I/O APIC
00000000000i[MEM0 ] Register memory access handlers: 0xfec00000 - 0xfec00fff
00000000000i[ ] init_dev of 'keyboard' plugin device by virtual method
00000000000i[KBD ] will paste characters every 1000 keyboard ticks
00000000000i[ ] init_dev of 'harddrv' plugin device by virtual method
00000000000i[HD ] Using boot sequence floppy, none, none
00000000000i[HD ] Floppy boot signature check is enabled
00000000000i[ ] init_dev of 'serial' plugin device by virtual method
00000000000i[SER ] com1 at 0x03f8 irq 4
00000000000i[ ] init_dev of 'parallel' plugin device by virtual method
00000000000i[PAR ] parallel port 1 at 0x0378 irq 7
00000000000i[ ] register state of 'unmapped' plugin device by virtual method
00000000000i[ ] register state of 'biosdev' plugin device by virtual method
00000000000i[ ] register state of 'speaker' plugin device by virtual method
00000000000i[ ] register state of 'extfpuirq' plugin device by virtual method
00000000000i[ ] register state of 'gameport' plugin device by virtual method
00000000000i[ ] register state of 'pci_ide' plugin device by virtual method
00000000000i[ ] register state of 'acpi' plugin device by virtual method
00000000000i[ ] register state of 'ioapic' plugin device by virtual method
00000000000i[ ] register state of 'keyboard' plugin device by virtual method
00000000000i[ ] register state of 'harddrv' plugin device by virtual method
00000000000i[ ] register state of 'serial' plugin device by virtual method
00000000000i[ ] register state of 'parallel' plugin device by virtual method
00000000000i[SYS ] bx_pc_system_c::Reset(HARDWARE) called
00000000000i[CPU0 ] cpu hardware reset
00000000000i[APIC0] allocate APIC id=0 (MMIO enabled) to 0xfee00000
00000000000i[CPU0 ] CPUID[0x00000000]: 00000003 756e6547 6c65746e 49656e69
00000000000i[CPU0 ] CPUID[0x00000001]: 00000f20 00000800 00002000 078bfbff
00000000000i[CPU0 ] CPUID[0x00000002]: 00410601 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x00000003]: 00000000 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x00000004]: 00000000 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x80000000]: 80000008 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x80000001]: 00000000 00000000 00000101 2a100800
00000000000i[CPU0 ] CPUID[0x80000002]: 20202020 20202020 20202020 6e492020
00000000000i[CPU0 ] CPUID[0x80000003]: 286c6574 50202952 69746e65 52286d75
00000000000i[CPU0 ] CPUID[0x80000004]: 20342029 20555043 20202020 00202020
00000000000i[CPU0 ] CPUID[0x80000006]: 00000000 42004200 02008140 00000000
00000000000i[CPU0 ] CPUID[0x80000007]: 00000000 00000000 00000000 00000000
00000000000i[CPU0 ] CPUID[0x80000008]: 00003020 00000000 00000000 00000000
00000000000i[ ] reset of 'unmapped' plugin device by virtual method
00000000000i[ ] reset of 'biosdev' plugin device by virtual method
00000000000i[ ] reset of 'speaker' plugin device by virtual method
00000000000i[ ] reset of 'extfpuirq' plugin device by virtual method
00000000000i[ ] reset of 'gameport' plugin device by virtual method
00000000000i[ ] reset of 'pci_ide' plugin device by virtual method
00000000000i[ ] reset of 'acpi' plugin device by virtual method
00000000000i[ ] reset of 'ioapic' plugin device by virtual method
00000000000i[ ] reset of 'keyboard' plugin device by virtual method
00000000000i[ ] reset of 'harddrv' plugin device by virtual method
00000000000i[ ] reset of 'serial' plugin device by virtual method
00000000000i[ ] reset of 'parallel' plugin device by virtual method
00000003305i[BIOS ] $Revision: 1.247 $ $Date: 2010/04/04 19:33:50 $
00000200000i[WGUI ] dimension update x=720 y=400 fontheight=16 fontwidth=9 bpp=8
00000318042i[KBD ] reset-disable command received
00000444800i[VBIOS] VGABios $Id: vgabios.c,v 1.69 2009/04/07 18:18:20 vruppert Exp $
00000444871i[CLVGA] VBE known Display Interface b0c0
00000444903i[CLVGA] VBE known Display Interface b0c5
00000447828i[VBIOS] VBE Bios $Id: vbe.c,v 1.62 2009/01/25 15:46:25 vruppert Exp $
00000760517i[BIOS ] Starting rombios32
00000761014i[BIOS ] Shutdown flag 0
00000761695i[BIOS ] ram_size=0x02000000
00000762173i[BIOS ] ram_end=32MB
00000802745i[BIOS ] Found 1 cpu(s)
00000822014i[BIOS ] bios_table_addr: 0x000fbc18 end=0x000fcc00
00000822117i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
00001149814i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
00001477742i[P2I ] PCI IRQ routing: PIRQA# set to 0x0b
00001477763i[P2I ] PCI IRQ routing: PIRQB# set to 0x09
00001477784i[P2I ] PCI IRQ routing: PIRQC# set to 0x0b
00001477805i[P2I ] PCI IRQ routing: PIRQD# set to 0x09
00001477815i[P2I ] write: ELCR2 = 0x0a
00001478700i[BIOS ] PIIX3/PIIX4 init: elcr=00 0a
00001486658i[BIOS ] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 class=0x0600
00001489220i[BIOS ] PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 class=0x0601
00001491621i[BIOS ] PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 class=0x0101
00001491851i[PIDE ] new BM-DMA address: 0xc000
00001492555i[BIOS ] region 4: 0x0000c000
00001494865i[BIOS ] PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 class=0x0680
00001495103i[ACPI ] new irq line = 11
00001495117i[ACPI ] new irq line = 9
00001495147i[ACPI ] new PM base address: 0xb000
00001495161i[ACPI ] new SM base address: 0xb100
00001495189i[PCI ] setting SMRAM control register to 0x4a
00001659283i[CPU0 ] Enter to System Management Mode
00001659293i[CPU0 ] RSM: Resuming from System Management Mode
00001823313i[PCI ] setting SMRAM control register to 0x0a
00001832484i[BIOS ] MP table addr=0x000fbcf0 MPC table addr=0x000fbc20 size=0xd0
00001834543i[BIOS ] SMBIOS table addr=0x000fbd00
00001836931i[BIOS ] ACPI tables: RSDP addr=0x000fbe20 ACPI DATA addr=0x01ff0000 size=0x988
00001840169i[BIOS ] Firmware waking vector 0x1ff00cc
00001851282i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
00001852126i[BIOS ] bios_table_cur_addr: 0x000fbe44
00014041543i[BIOS ] Booting from 0000:7c00
00019105039i[KBD ] setting typematic info
00019105052i[KBD ] setting delay to 500 mS (unused)
00019105052i[KBD ] setting repeat rate to 10.9 cps (unused)
00019105085i[KBD ] Switched to scancode set 2
00019105160i[KBD ] keyboard: scan convert turned off
00019184168e[CPU0 ] interrupt(): gate.type(1) != {5,6,7,14,15}
00019184168e[CPU0 ] interrupt(): gate descriptor is not valid sys seg (vector=0x0d)
00019184168e[CPU0 ] interrupt(): gate.type(1) != {5,6,7,14,15}
00019184168i[CPU0 ] CPU is in protected mode (active)
00019184168i[CPU0 ] CS.d_b = 32 bit
00019184168i[CPU0 ] SS.d_b = 32 bit
00019184168i[CPU0 ] EFER = 0x00000000
00019184168i[CPU0 ] | RAX=00000000000011a5 RBX=0000000000001116
00019184168i[CPU0 ] | RCX=000000000010a977 RDX=0000000000000eea
00019184168i[CPU0 ] | RSP=000000000008ffc8 RBP=0000000000003000
00019184168i[CPU0 ] | RSI=00000000000000ff RDI=0000000000105001
00019184168i[CPU0 ] | R8=0000000000000000 R9=0000000000000000
00019184168i[CPU0 ] | R10=0000000000000000 R11=0000000000000000
00019184168i[CPU0 ] | R12=0000000000000000 R13=0000000000000000
00019184168i[CPU0 ] | R14=0000000000000000 R15=0000000000000000
00019184168i[CPU0 ] | IOPL=0 id vip vif ac vm RF nt of df IF tf sf zf AF PF cf
00019184168i[CPU0 ] | SEG selector base limit G D
00019184168i[CPU0 ] | SEG sltr(index|ti|rpl) base limit G D
00019184168i[CPU0 ] | CS:0008( 0001| 0| 0) 00000000 ffffffff 1 1
00019184168i[CPU0 ] | DS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00019184168i[CPU0 ] | SS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00019184168i[CPU0 ] | ES:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00019184168i[CPU0 ] | FS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00019184168i[CPU0 ] | GS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00019184168i[CPU0 ] | MSR_FS_BASE:0000000000000000
00019184168i[CPU0 ] | MSR_GS_BASE:0000000000000000
00019184168i[CPU0 ] | RIP=00000000001030d7 (00000000001030d7)
00019184168i[CPU0 ] | CR0=0x60000011 CR2=0x0000000000000000
00019184168i[CPU0 ] | CR3=0x00000000 CR4=0x00000000
00019184168i[CPU0 ] 0x00000000001030d7>> jnz .-25 (0x001030c0) : 75E7
00019184168e[CPU0 ] exception(): 3rd (13) exception with no resolution, shutdown status is 00h, resetting
00019184168i[SYS ] bx_pc_system_c::Reset(HARDWARE) called
00019184168i[CPU0 ] cpu hardware reset
00019184168i[APIC0] allocate APIC id=0 (MMIO enabled) to 0xfee00000
00019184168i[CPU0 ] CPUID[0x00000000]: 00000003 756e6547 6c65746e 49656e69
00019184168i[CPU0 ] CPUID[0x00000001]: 00000f20 00000800 00002000 078bfbff
00019184168i[CPU0 ] CPUID[0x00000002]: 00410601 00000000 00000000 00000000
00019184168i[CPU0 ] CPUID[0x00000003]: 00000000 00000000 00000000 00000000
00019184168i[CPU0 ] CPUID[0x00000004]: 00000000 00000000 00000000 00000000
00019184168i[CPU0 ] CPUID[0x80000000]: 80000008 00000000 00000000 00000000
00019184168i[CPU0 ] CPUID[0x80000001]: 00000000 00000000 00000101 2a100800
00019184168i[CPU0 ] CPUID[0x80000002]: 20202020 20202020 20202020 6e492020
00019184168i[CPU0 ] CPUID[0x80000003]: 286c6574 50202952 69746e65 52286d75
00019184168i[CPU0 ] CPUID[0x80000004]: 20342029 20555043 20202020 00202020
00019184168i[CPU0 ] CPUID[0x80000006]: 00000000 42004200 02008140 00000000
00019184168i[CPU0 ] CPUID[0x80000007]: 00000000 00000000 00000000 00000000
00019184168i[CPU0 ] CPUID[0x80000008]: 00003020 00000000 00000000 00000000
00019184168i[ ] reset of 'unmapped' plugin device by virtual method
00019184168i[ ] reset of 'biosdev' plugin device by virtual method
00019184168i[ ] reset of 'speaker' plugin device by virtual method
00019184168i[ ] reset of 'extfpuirq' plugin device by virtual method
00019184168i[ ] reset of 'gameport' plugin device by virtual method
00019184168i[ ] reset of 'pci_ide' plugin device by virtual method
00019184168i[ ] reset of 'acpi' plugin device by virtual method
00019184168i[ ] reset of 'ioapic' plugin device by virtual method
00019184168i[ ] reset of 'keyboard' plugin device by virtual method
00019184168i[ ] reset of 'harddrv' plugin device by virtual method
00019184168i[ ] reset of 'serial' plugin device by virtual method
00019184168i[ ] reset of 'parallel' plugin device by virtual method
00019187474i[BIOS ] $Revision: 1.247 $ $Date: 2010/04/04 19:33:50 $
00019502059i[KBD ] reset-disable command received
00019628817i[VBIOS] VGABios $Id: vgabios.c,v 1.69 2009/04/07 18:18:20 vruppert Exp $
00019628888i[CLVGA] VBE known Display Interface b0c0
00019628920i[CLVGA] VBE known Display Interface b0c5
00019631845i[VBIOS] VBE Bios $Id: vbe.c,v 1.62 2009/01/25 15:46:25 vruppert Exp $
00019944534i[BIOS ] Starting rombios32
00019945031i[BIOS ] Shutdown flag 0
00019945712i[BIOS ] ram_size=0x02000000
00019946190i[BIOS ] ram_end=32MB
00019986786i[BIOS ] Found 1 cpu(s)
00020006055i[BIOS ] bios_table_addr: 0x000fbc18 end=0x000fcc00
00020006158i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
00020333855i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
00020661783i[P2I ] PCI IRQ routing: PIRQA# set to 0x0b
00020661804i[P2I ] PCI IRQ routing: PIRQB# set to 0x09
00020661825i[P2I ] PCI IRQ routing: PIRQC# set to 0x0b
00020661846i[P2I ] PCI IRQ routing: PIRQD# set to 0x09
00020661856i[P2I ] write: ELCR2 = 0x0a
00020662741i[BIOS ] PIIX3/PIIX4 init: elcr=00 0a
00020670699i[BIOS ] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 class=0x0600
00020673261i[BIOS ] PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 class=0x0601
00020675662i[BIOS ] PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 class=0x0101
00020676596i[BIOS ] region 4: 0x0000c000
00020678906i[BIOS ] PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 class=0x0680
00020679144i[ACPI ] new irq line = 11
00020679158i[ACPI ] new irq line = 9
00020679230i[PCI ] setting SMRAM control register to 0x4a
00020843324i[CPU0 ] Enter to System Management Mode
00020843334i[CPU0 ] RSM: Resuming from System Management Mode
00021007354i[PCI ] setting SMRAM control register to 0x0a
00021016525i[BIOS ] MP table addr=0x000fbcf0 MPC table addr=0x000fbc20 size=0xd0
00021018584i[BIOS ] SMBIOS table addr=0x000fbd00
00021020972i[BIOS ] ACPI tables: RSDP addr=0x000fbe20 ACPI DATA addr=0x01ff0000 size=0x988
00021024210i[BIOS ] Firmware waking vector 0x1ff00cc
00021035323i[PCI ] 440FX PMC write to PAM register 59 (TLB Flush)
00021036167i[BIOS ] bios_table_cur_addr: 0x000fbe44
00033225716i[BIOS ] Booting from 0000:7c00
00038289036i[KBD ] setting typematic info
00038289049i[KBD ] setting delay to 500 mS (unused)
00038289049i[KBD ] setting repeat rate to 10.9 cps (unused)
00038289082i[KBD ] Switched to scancode set 2
00038289157i[KBD ] keyboard: scan convert turned off
00220440000p[WGUI ] >>PANIC<< POWER button turned off.
00220440000i[CPU0 ] CPU is in protected mode (active)
00220440000i[CPU0 ] CS.d_b = 32 bit
00220440000i[CPU0 ] SS.d_b = 32 bit
00220440000i[CPU0 ] EFER = 0x00000000
00220440000i[CPU0 ] | RAX=0000000000000700 RBX=000000000008ffa0
00220440000i[CPU0 ] | RCX=00000000000b8000 RDX=00000000000bf01c
00220440000i[CPU0 ] | RSP=000000000008ff20 RBP=0000000000003000
00220440000i[CPU0 ] | RSI=0000000000008000 RDI=0000000000000028
00220440000i[CPU0 ] | R8=0000000000000000 R9=0000000000000000
00220440000i[CPU0 ] | R10=0000000000000000 R11=0000000000000000
00220440000i[CPU0 ] | R12=0000000000000000 R13=0000000000000000
00220440000i[CPU0 ] | R14=0000000000000000 R15=0000000000000000
00220440000i[CPU0 ] | IOPL=0 id vip vif ac vm rf nt of df if tf sf zf af pf cf
00220440000i[CPU0 ] | SEG selector base limit G D
00220440000i[CPU0 ] | SEG sltr(index|ti|rpl) base limit G D
00220440000i[CPU0 ] | CS:0008( 0001| 0| 0) 00000000 ffffffff 1 1
00220440000i[CPU0 ] | DS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00220440000i[CPU0 ] | SS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00220440000i[CPU0 ] | ES:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00220440000i[CPU0 ] | FS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00220440000i[CPU0 ] | GS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
00220440000i[CPU0 ] | MSR_FS_BASE:0000000000000000
00220440000i[CPU0 ] | MSR_GS_BASE:0000000000000000
00220440000i[CPU0 ] | RIP=0000000000102a49 (0000000000102a49)
00220440000i[CPU0 ] | CR0=0x60000011 CR2=0x0000000000000000
00220440000i[CPU0 ] | CR3=0x00000000 CR4=0x00000000
00220440000i[CPU0 ] 0x0000000000102a49>> jmp .-2 (0x00102a49) : EBFE
00220440000i[CMOS ] Last time is 1278138462 (Sat Jul 03 09:27:42 2010)
00220440000i[ ] restoring default signal behavior
00220440000i[CTRL ] quit_sim called with exit code 1

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@ -1,14 +0,0 @@
# ROM and VGA BIOS images ---------------------------------------------
romimage: file=BIOS-bochs-latest, address=0xe0000
vgaromimage: file=VGABIOS-lgpl-latest
# boot from floppy using our disk image -------------------------------
floppya: 1_44=ctaos.img, status=inserted
# logging and reporting -----------------------------------------------
log: OSDev.log # All errors and info logs will output to OSDev.log
error: action=report
info: action=report

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@ -2,7 +2,7 @@
#define __CONIO_H
#define _ATTRIB 0x0F
extern byte default_background, default_foreground;
extern unsigned char default_background, default_foreground;
extern char hex[16];
extern void itoa (int value, char *string, unsigned int radix);
@ -10,21 +10,21 @@ extern int printf(const char* str, ...);
extern int abs(int x);
extern void graphics_init();
extern void text_mode_cursor(int x, int y);
extern void set_default_colors(byte back, byte fore);
extern void set_default_colors(unsigned char back, unsigned char fore);
extern void clrscr();
extern void scroll(int n);
extern void prev_line();
extern void next_line();
extern void putc_pos_font(int x, int y, char c, byte back, byte fore);
extern void putc_pos_font(int x, int y, char c, unsigned char back, unsigned char fore);
extern void putc_pos(int x, int y, char c);
extern void putc_font(char c, byte back, byte fore);
extern void putc_font(char c, unsigned char back, unsigned char fore);
extern void putc(char c);
extern void puts_pos_font(int x, int y, const char *str, byte back, byte fore);
extern void puts_pos_font(int x, int y, const char *str, unsigned char back, unsigned char fore);
extern void puts_pos(int x, int y, const char *str);
extern void puts(const char *str);
extern void puts_font(const char *str, byte back, byte fore);
extern void puts_font(const char *str, unsigned char back, unsigned char fore);
extern void put_hex(unsigned int alpha);
extern void put_hex_pos(int x, int y, unsigned int alpha);
extern void put_bin (int x, int y, byte xz);
extern void put_bin (int x, int y, unsigned char xz);
#endif

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@ -5,6 +5,7 @@
#include <time.h>
#include <bootinfo.h>
#include "memory/mmngr_ph.h"
#include "memory/mmngr_vi.h"
#include "shell/shell.c"
//! format of a memory region
@ -47,7 +48,6 @@ void k_init(multiboot_info* bootinfo)
set_default_colors (0x07, 0x04);
clrscr();
// Start memory manager
uint32_t memSize = 1024 + bootinfo->m_memoryLo + bootinfo->m_memoryHi*64;
memory_region* memMap = (memory_region*)0x1000;
@ -55,9 +55,18 @@ void k_init(multiboot_info* bootinfo)
unsigned int i;
for (i=0; (memMap[i].sizeHi != 0 || memMap[i].sizeLo != 0) && i<3; ++i)
for (i=0; (memMap[i].sizeHi != 0 || memMap[i].sizeLo != 0) && i<15; ++i)
if (memMap[i].type==1) pmmngr_init_region (memMap[i].startLo, memMap[i].sizeLo);
// Protect kernel, bios data area etc
_end += (memSize / 4) * 3;
pmmngr_deinit_region (0x100000, _end - 0x100000);
pmmngr_deinit_region (0x0, 0x500);
pmmngr_deinit_region (0x9FC00, 0x400);
pmmngr_deinit_region (0xA0000, 0x60000);
// Start Virtual Memory Manager & Enable paging
vmmngr_initialize();
}
void k_main(uint32_t kernel_size, multiboot_info* bootinfo)

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@ -16,13 +16,20 @@ goto build
:build
@echo Building Memory Manager...
del %objpath%\mmngr_cr.o
del %objpath%\mmngr.o
del %objpath%\mmngr_ph.o
@echo * Compiling Physical Memory Manager...
%nasm_path%\nasm.exe -f aout -o %objpath%/mmngr_cr.o mmngr_cr.asm
%nasm_path%\nasm.exe -f aout -o %objpath%/mmngr.o mmngr.asm
%djgpp_path%\gcc.exe -Wall -O -fstrength-reduce -fomit-frame-pointer -nostdinc -fno-builtin -I%incpath% -c -o %objpath%/mmngr_ph.o mmngr_ph.c
@echo * Compiling Virtual Memory Manager...
%djgpp_path%\gcc.exe -Wall -O -fstrength-reduce -fomit-frame-pointer -nostdinc -fno-builtin -I%incpath% -c -o %objpath%/mmngr_vi.o mmngr_vi.c
%djgpp_path%\gcc.exe -Wall -O -fstrength-reduce -fomit-frame-pointer -nostdinc -fno-builtin -I%incpath% -c -o %objpath%/mmngr_de.o lib/pde.c
%djgpp_path%\gcc.exe -Wall -O -fstrength-reduce -fomit-frame-pointer -nostdinc -fno-builtin -I%incpath% -c -o %objpath%/mmngr_te.o lib/pte.c
:check
if not exist %objpath%\mmngr_cr.o goto error
if not exist %objpath%\mmngr_vi.o goto error
if not exist %objpath%\mmngr_de.o goto error
if not exist %objpath%\mmngr_te.o goto error
if not exist %objpath%\mmngr.o goto error
if not exist %objpath%\mmngr_ph.o goto error

36
SysCore/memory/lib/pde.c Normal file
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@ -0,0 +1,36 @@
#include "pde.h"
void pd_entry_add_attrib (pd_entry* entry, unsigned mask) {
*entry |= mask;
}
void pd_entry_del_attrib (pd_entry* entry, unsigned mask) {
*entry &= ~mask;
}
void pd_entry_set_frame (pd_entry* entry, unsigned address) {
*entry = (*entry & ~_I86_PDE_FRAME) | address;
}
unsigned pd_entry_get_frame (pd_entry entry) {
return entry&_I86_PDE_FRAME;
}
unsigned char pd_entry_is_present (pd_entry entry) {
return (entry & _I86_PDE_PRESENT);
}
unsigned char pd_entry_is_user (pd_entry entry) {
return (entry & _I86_PDE_USER);
}
unsigned char pd_entry_is_4mb (pd_entry entry) {
return (entry & _I86_PDE_4MB);
}
unsigned char pd_entry_is_writable (pd_entry entry) {
return (entry & _I86_PDE_WRITABLE);
}
void pd_entry_enable_global (pd_entry entry) {
}

30
SysCore/memory/lib/pde.h Normal file
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@ -0,0 +1,30 @@
#ifndef __PAGE_DIRECTORY_ENTRY_
#define __PAGE_DIRECTORY_ENTRY_
enum __PAGE_PDE_FLAGS {
_I86_PDE_PRESENT = 1,
_I86_PDE_WRITABLE = 2,
_I86_PDE_USER = 4,
_I86_PDE_PWT = 8,
_I86_PDE_PCD = 0x10,
_I86_PDE_ACCESSED = 0x20,
_I86_PDE_DIRTY = 0x40,
_I86_PDE_4MB = 0x80,
_I86_PDE_CPU_GLOBAL = 0x100,
_I86_PDE_LV4_GLOBAL = 0x200,
_I86_PDE_FRAME = 0x7FFFF000
};
typedef unsigned pd_entry;
extern void pd_entry_add_attrib (pd_entry* entry, unsigned mask);
extern void pd_entry_del_attrib (pd_entry* entry, unsigned mask);
extern void pd_entry_set_frame (pd_entry* entry, unsigned address);
extern unsigned pd_entry_get_frame (pd_entry entry);
extern unsigned char pd_entry_is_present (pd_entry entry);
extern unsigned char pd_entry_is_user (pd_entry entry);
extern unsigned char pd_entry_is_4mb (pd_entry entry);
extern unsigned char pd_entry_is_writable (pd_entry entry);
extern void pd_entry_enable_global (pd_entry entry);
#endif

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@ -1,4 +1,4 @@
#include <pte.h>
#include "pte.h"
void pt_entry_add_attrib (pt_entry* entry, unsigned mask) {
*entry |= mask;
@ -9,18 +9,17 @@ void pt_entry_add_attrib (pt_entry* entry, unsigned mask) {
}
void pt_entry_set_frame (pt_entry* entry, unsigned address) {
*entry &= ~_I86_PTE_FRAME;
*entry |= address & _I86_PTE_FRAME;
*entry = (*entry & ~_I86_PTE_FRAME) | address;
}
unsigned pt_entry_get_frame (pt_entry entry) {
return entry&_I86_PTE_FRAME;
return (entry & _I86_PTE_FRAME);
}
unsigned char pt_entry_is_present (pt_entry entry) {
return ( (entry & _I86_PTE_PRESENT) > 0 );
return (entry & _I86_PTE_PRESENT);
}
unsigned char pt_entry_is_writable (pt_entry entry) {
return ( (entry & _I86_PTE_WRITABLE) > 0 );
return (entry & _I86_PTE_WRITABLE);
}

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@ -27,3 +27,11 @@ _write_cr3:
mov cr3, eax
pop ebp
retn
global _vmmngr_flush_tbl_entry
_vmmngr_flush_tbl_entry:
mov eax, [ebp+8]
cli
invlpg [eax]
sti
retn

View File

@ -1,26 +1,34 @@
/******************************************************
* Physical Memory Manager *
******************************************************/
#include <system.h>
#include <string.h>
// +==============================================+
// | HEADERS |
// +===================================== cta os =+
#include "mmngr_ph.h"
// +==============================================+
// | DEFINITIONS |
// +===================================== cta os =+
#define PMMNGR_BLOCK_SIZE 4096 // block size (4k)
#define PMMNGR_BLOCK_ALIGN PMMNGR_BLOCK_SIZE // block alignment
struct memory_stack_entry{
word low;
byte high;
} __attribute__ ((__packed__));
typedef struct memory_stack_entry mstack;
static uint32_t _mmngr_memory_size=0; // size of physical memory
static uint32_t _mmngr_used_blocks=0; // number of blocks currently in use
static uint32_t _mmngr_max_blocks=0; // maximum number of available memory blocks
static uint32_t _mmngr_index = 0;
// +==============================================+
// | DATA DECLARATIONS |
// +===================================== cta os =+
static unsigned _mmngr_memory_size=0; // size of physical memory
static unsigned _mmngr_used_blocks=0; // number of blocks currently in use
static unsigned _mmngr_max_blocks=0; // maximum number of available memory blocks
static unsigned _mmngr_index = 0;
static mstack* _mmngr_memory_stack= 0; // memory stack
// +==============================================+
// | LOCAL FUNCTIONS |
// +===================================== cta os =+
inline mstack mstack_pop ()
{
mstack temp;
@ -34,7 +42,6 @@ inline mstack mstack_pop ()
return temp;
}
inline void mstack_push (const mstack *block)
{
if (block->low == 0 && block-> high == 0) return;
@ -46,54 +53,90 @@ inline void mstack_push (const mstack *block)
_mmngr_used_blocks--;
}
inline byte mstack_test (const mstack *block)
inline int mstack_test (const mstack *block)
{
uint32_t i;
unsigned i;
for (i = 0; i < _mmngr_index; i++)
if (_mmngr_memory_stack[i].low == block->low && _mmngr_memory_stack[i].high == block->high) return 1;
if (_mmngr_memory_stack[i].low == block->low && _mmngr_memory_stack[i].high == block->high)
return (int) i;
return 0;
return -1;
}
byte pmmngr_test_block (uint32_t block)
inline int mstack_qsort_cmp (mstack a, mstack b)
{
mstack temp;
temp.low = block & 0xFFFF;
temp.high = (block>>16) & 0xFF;
return mstack_test(&temp);
return (a.high == b.high) ? (int)a.low - (int)b.low : (int)a.high - (int)b.high;
}
void pmmngr_free_block(void* address)
void mstack_qsort(int beg, int end)
{
// Calculate block
mstack block;
uint32_t temp = (uint32_t)address / PMMNGR_BLOCK_SIZE;
block.low = temp & 0xFFFF;
block.high = (temp>>16) & 0xFF;
// Push it
mstack_push (&block);
mstack piv; mstack tmp;
int l,r,p;
while (beg<end) // This while loop will avoid the second recursive call
{
l = beg; p = (beg+end)/2; r = end;
piv.low = _mmngr_memory_stack[p].low;
piv.high = _mmngr_memory_stack[p].high;
while (1)
{
while ((l<=r) && (mstack_qsort_cmp(_mmngr_memory_stack[l],piv) <= 0)) l++;
while ((l<=r) && (mstack_qsort_cmp(_mmngr_memory_stack[r],piv) > 0)) r--;
if (l>r) break;
tmp.low = _mmngr_memory_stack[l].low;
tmp.high = _mmngr_memory_stack[l].high;
_mmngr_memory_stack[l].low = _mmngr_memory_stack[r].low;
_mmngr_memory_stack[l].high = _mmngr_memory_stack[r].high;
_mmngr_memory_stack[r].low = tmp.low;
_mmngr_memory_stack[r].high = tmp.high;
if (p==r) p=l;
l++; r--;
}
_mmngr_memory_stack[p].low = _mmngr_memory_stack[r].low;
_mmngr_memory_stack[p].high = _mmngr_memory_stack[r].high;
_mmngr_memory_stack[r].low = piv.low;
_mmngr_memory_stack[r].high = piv.high;
r--;
// Recursion on the shorter side & loop (with new indexes) on the longer
if ((r-beg)<(end-l)) {
mstack_qsort(beg, r);
beg=l;
}
else {
mstack_qsort(l, end);
end=r;
}
}
}
void* pmmngr_alloc_block()
// +==============================================+
// | DEBUGGING FUNCTIONS |
// +===================================== cta os =+
/*void print_stack()
{
if (_mmngr_index == 0) return 0;// Out of memory
// pop a block
mstack block = mstack_pop();
// Calculate and return address;
void* address;
uint32_t temp = block.low | (block.high<<16);
address = (void *)(temp * PMMNGR_BLOCK_SIZE);
return address;
int i;
for (i = 0; i < _mmngr_index; i++) printf (" %u", _mmngr_memory_stack[i].low);
}
extern char getch();*/
void pmmngr_init (size_t memSize, uint32_t stack) {
// +==============================================+
// | INITIALISATION FUNCTIONS |
// +===================================== cta os =+
void pmmngr_init (unsigned memSize, unsigned stack) {
_mmngr_memory_size = memSize;
_mmngr_memory_stack = (mstack*) stack;
@ -104,7 +147,7 @@ void pmmngr_init (size_t memSize, uint32_t stack) {
// By default, all of memory is in use
}
void pmmngr_init_region (physical_addr base, size_t size) {
void pmmngr_init_region (unsigned base, unsigned size) {
mstack block;
@ -121,7 +164,7 @@ void pmmngr_init_region (physical_addr base, size_t size) {
}
void pmmngr_deinit_region (physical_addr base, size_t size) {
void pmmngr_deinit_region (unsigned base, unsigned size) {
unsigned int start = base / PMMNGR_BLOCK_SIZE;
unsigned int count = size / PMMNGR_BLOCK_SIZE;
int temp;
@ -161,28 +204,136 @@ void pmmngr_deinit_region (physical_addr base, size_t size) {
}
size_t pmmngr_get_memory_size () {
// +==============================================+
// | MEMORY MANAGING FUNCTIONS |
// +===================================== cta os =+
unsigned char pmmngr_test_block (unsigned block)
{
mstack temp;
temp.low = block & 0xFFFF;
temp.high = (block>>16) & 0xFF;
return (mstack_test(&temp) == -1)? 0 : 1;
}
void pmmngr_free_block(void* address)
{
// Calculate block
mstack block;
unsigned temp = (unsigned)address / PMMNGR_BLOCK_SIZE;
block.low = temp & 0xFFFF;
block.high = (temp>>16) & 0xFF;
// Push it
mstack_push (&block);
}
void pmmngr_free_blocks (unsigned base, unsigned size)
{
mstack start, end, i;
// 4k align
base /= PMMNGR_BLOCK_SIZE;
size /= PMMNGR_BLOCK_SIZE;
// Calculate blocks
start.low = base & 0xFFFF;
start.high = (base >> 16) & 0xFF;
end.low = (base + size) & 0xFFFF;
end.high = ((base + size)>>16) & 0xFF;
for (i.low = start.low, i.high = start.high; // i = start
i.low < end.low || i.high < end.high;) // i != end
{
// only push if block is used
if (mstack_test(&i) == -1) mstack_push(&i);
// increment i.high
if (i.low == 0xFFFF) {
i.low = 0; i.high++;
}
else i.low++;
}
}
void* pmmngr_alloc_block()
{
if (_mmngr_index == 0) return 0;// Out of memory
// pop a block
mstack block = mstack_pop();
// Calculate and return address;
void* address;
unsigned temp = block.low | (block.high<<16);
address = (void *)(temp * PMMNGR_BLOCK_SIZE);
return address;
}
void* pmmngr_alloc_blocks (unsigned blocks)
{
// Less than 2 blocks requested
if (blocks == 0) return 0;
if (blocks == 1) return pmmngr_alloc_block();
// Sort the stack for the next step
mstack_qsort(0, (int)_mmngr_index);
int i = (int) _mmngr_index-1; // i = counter
int l = 1; // l = number of consecutive blocks
unsigned temp; // temp = temporary storage
unsigned prev = _mmngr_memory_stack[i].low | (_mmngr_memory_stack[i].high<<16); --i;
// Search consecutive blocks
for (; i >=0; i--) {
temp = _mmngr_memory_stack[i].low | (_mmngr_memory_stack[i].high<<16);
if (temp == prev-1) l++;
else l = 1;
if (l == blocks) {
pmmngr_deinit_region (temp * PMMNGR_BLOCK_SIZE, blocks * PMMNGR_BLOCK_SIZE);
return (void*) (temp * PMMNGR_BLOCK_SIZE);
}
prev = temp;
}
return 0; // Could not find so many free blocks
}
// +==============================================+
// | GET DATA FUNCTIONS |
// +===================================== cta os =+
unsigned pmmngr_get_memory_size () {
return _mmngr_memory_size;
}
uint32_t pmmngr_get_block_count () {
unsigned pmmngr_get_block_count () {
return _mmngr_max_blocks;
}
uint32_t pmmngr_get_use_block_count () {
unsigned pmmngr_get_use_block_count () {
return _mmngr_used_blocks;
}
uint32_t pmmngr_get_free_block_count () {
unsigned pmmngr_get_free_block_count () {
return _mmngr_index;
}
uint32_t pmmngr_get_block_size () {
unsigned pmmngr_get_block_size () {
return PMMNGR_BLOCK_SIZE;
}
void pmmngr_paging_enable (byte b) {
uint32_t temp;
// +==============================================+
// | PAGING RELATED FUNCTIONS |
// +===================================== cta os =+
void pmmngr_paging_enable (unsigned char b) {
unsigned temp;
temp = read_cr0();
// Enable
@ -192,13 +343,7 @@ void pmmngr_paging_enable (byte b) {
write_cr0(temp);
}
byte pmmngr_is_paging () {
uint32_t temp = read_cr0();
unsigned char pmmngr_is_paging () {
unsigned temp = read_cr0();
return ((temp&0x80000000)>0);
}
mstack* pmmngr_get_stack_addr()
{
return _mmngr_memory_stack;
}

View File

@ -1,33 +1,47 @@
#ifndef _MMNGR_PHYS_H
#define _MMNGR_PHYS_H
#include <stdint.h>
#include <system.h>
#define pmmngr_load_PDBR(addr) write_cr3(addr)
#define pmmngr_get_PDBR() read_cr3()
// physical address
typedef unsigned physical_addr;
extern uint32_t read_cr0();
extern uint32_t read_cr3();
extern void write_cr0(uint32_t data);
extern void write_cr3(uint32_t data);
extern void pmmngr_free_block(void* address); // releases a memory block
extern void* pmmngr_alloc_block (); // allocates a single memory block
extern void pmmngr_init (size_t memSize, uint32_t stack); // initialize the physical memory manager
extern void pmmngr_init_region (physical_addr base, size_t size); // enables a physical memory region for use
extern void pmmngr_deinit_region (physical_addr base, size_t size); // disables a physical memory region as in use (unuseable)
extern size_t pmmngr_get_memory_size (); // returns amount of physical memory the manager is set to use
extern uint32_t pmmngr_get_use_block_count (); // returns number of blocks currently in use
extern uint32_t pmmngr_get_free_block_count (); // returns number of blocks not in use
extern uint32_t pmmngr_get_block_count (); // returns number of memory blocks
extern uint32_t pmmngr_get_block_size (); // returns default memory block size in bytes
extern void pmmngr_paging_enable (byte b); // enable or disable paging
extern byte pmmngr_is_paging (); // test if paging is enabled
struct memory_stack_entry{
unsigned short low;
unsigned char high;
} __attribute__ ((__packed__));
typedef struct memory_stack_entry mstack;
// CR registers r/w operations
extern unsigned read_cr0();
extern unsigned read_cr3();
extern void write_cr0(unsigned data);
extern void write_cr3(unsigned data);
// Free/Alloc memory block(s)
extern void pmmngr_free_block(void* address);
extern void pmmngr_free_blocks(unsigned base, unsigned size);
extern void* pmmngr_alloc_block ();
extern void* pmmngr_alloc_blocks (unsigned blocks);
// De/Initialisation routines
extern void pmmngr_init (unsigned memSize, unsigned stack);
extern void pmmngr_init_region (unsigned base, unsigned size);
extern void pmmngr_deinit_region (unsigned base, unsigned size);
// Useful information
extern unsigned pmmngr_get_memory_size (); // returns amount of physical memory the manager is set to use
extern unsigned pmmngr_get_use_block_count (); // returns number of blocks currently in use
extern unsigned pmmngr_get_free_block_count (); // returns number of blocks not in use
extern unsigned pmmngr_get_block_count (); // returns number of memory blocks
extern unsigned pmmngr_get_block_size (); // returns default memory block size in unsigned chars
extern unsigned char pmmngr_test_block (unsigned block);
// Paging
extern void pmmngr_paging_enable (unsigned char b); // enable or disable paging
extern unsigned char pmmngr_is_paging (); // test if paging is enabled
extern void print_stack();
extern byte pmmngr_test_block (uint32_t block);
#endif

140
SysCore/memory/mmngr_vi.c Normal file
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@ -0,0 +1,140 @@
// +==============================================+
// | HEADERS |
// +===================================== cta os =+
#include "mmngr_vi.h"
#include "mmngr_ph.h"
// +==============================================+
// | DEFINITIONS |
// +===================================== cta os =+
#define PAGE_SIZE 4096
#define PTABLE_ADDR_SPACE_SIZE 0x400000
#define DTABLE_ADDR_SPACE_SIZE 0xffffffff
pdirectory* _current_directory;
unsigned _current_page_directory_base_register;
extern unsigned char *memset (unsigned char *dest, unsigned char val, int count);
extern char getch();
// +==============================================+
// | PAGE FUNCTIONS |
// +===================================== cta os =+
unsigned char vmmngr_alloc_page (pt_entry* entry)
{
void* p = pmmngr_alloc_block ();
if (!p) return 0;
pt_entry_set_frame(entry, (unsigned)p);
pt_entry_add_attrib (entry, _I86_PTE_PRESENT);
return 1;
}
void vmmngr_free_page (pt_entry* entry)
{
void* p = (void*) pt_entry_get_frame(*entry);
if (p) pmmngr_free_block (p);
pt_entry_del_attrib (entry, _I86_PTE_PRESENT);
}
// +==============================================+
// | PAGE TABLE FUNCTIONS |
// +===================================== cta os =+
inline void vmmngr_ptable_clear(ptable* p)
{
if(p) memset ((unsigned char*)p, 0, sizeof(ptable));
}
inline unsigned vmmngr_ptable_virt_to_index (unsigned addr)
{
return (addr >= PTABLE_ADDR_SPACE_SIZE) ? 0 : addr/PAGE_SIZE;
}
inline pt_entry* vmmngr_ptable_lookup_entry (ptable* p, unsigned addr)
{
if (p) return &p->m_entries[vmmngr_ptable_virt_to_index(addr)];
return 0;
}
// +==============================================+
// | PAGE DIRECTORY FUNCTIONS |
// +===================================== cta os =+
inline void vmmngr_pdirectory_clear(pdirectory* dir)
{
if(dir) memset ((unsigned char*)dir, 0, sizeof(pdirectory));
}
inline unsigned vmmngr_pdirectory_virt_to_index (unsigned addr)
{
return (addr > DTABLE_ADDR_SPACE_SIZE) ? 0 : addr/PAGE_SIZE;
}
inline pd_entry* vmmngr_pdirectory_lookup_entry (pdirectory* dir, unsigned addr)
{
if (dir) return &dir->m_entries[vmmngr_ptable_virt_to_index(addr)];
return 0;
}
// +==============================================+
// | VIRTUAL MEMORY MANAGER |
// +===================================== cta os =+
inline unsigned char vmmngr_switch_pdirectory (pdirectory* dir)
{
if (!dir) return 0;
_current_directory = dir;
write_cr3 (_current_page_directory_base_register);
return 1;
}
pdirectory* vmmngr_get_directory() {
return _current_directory;
}
void vmmngr_initialize()
{
// Allocate default page table
ptable* table = (ptable*) pmmngr_alloc_block();
if (!table) return;
// Clear page table
vmmngr_ptable_clear(table);
// Identity map the first page table
int i, frame;
for (i = 0, frame = 0; i < 1024; i++, frame += 4096)
{
// Create a new page
pt_entry page = 0;
pt_entry_add_attrib (&page, _I86_PTE_PRESENT);
pt_entry_set_frame (&page, frame);
table->m_entries[vmmngr_ptable_virt_to_index(frame)] = page;
}
// Create default directory table
pdirectory* dir = (pdirectory*) pmmngr_alloc_blocks(3);
if (!dir) return;
// Clear directory table and set it as current
vmmngr_pdirectory_clear(dir);
// Get first entry in dir table and set it up to point to our table
pd_entry* entry = vmmngr_pdirectory_lookup_entry(dir, 0);
pd_entry_add_attrib (entry, _I86_PDE_PRESENT);
pd_entry_add_attrib (entry, _I86_PDE_WRITABLE);
pd_entry_set_frame (entry, (unsigned) table);
// Store current PDBR
_current_page_directory_base_register = (unsigned) &dir->m_entries;
// Switch to our page directory
vmmngr_switch_pdirectory (dir);
// Enable paging
pmmngr_paging_enable (1);
}

25
SysCore/memory/mmngr_vi.h Normal file
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@ -0,0 +1,25 @@
#ifndef __MEMORY_MANAGER_VIRTUAL__
#define __MEMORY_MANAGER_VIRTUAL__
#include "lib/pde.h"
#include "lib/pte.h"
#define PAGES_PER_TABLE 1024
#define PAGES_PER_DIR 1024
typedef unsigned virtual_address;
typedef struct {
pt_entry m_entries[PAGES_PER_TABLE];
} ptable ;
typedef struct {
pd_entry m_entries[PAGES_PER_DIR];
} pdirectory ;
//extern pdirectory* _current_directory;
extern void vmmngr_flush_tbl_entry (unsigned addr);
extern void vmmngr_initialize();
#endif

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@ -1,26 +0,0 @@
#include <pde.h>
void pt_entry_add_attrib (pt_entry* entry, unsigned mask) {
*entry |= mask;
}
void pt_entry_del_attrib (pt_entry* entry, unsigned mask) {
*entry &= ~mask;
}
void pt_entry_set_frame (pt_entry* entry, unsigned address) {
*entry &= ~_I86_PTE_FRAME;
*entry |= address & _I86_PTE_FRAME;
}
unsigned pt_entry_get_frame (pt_entry entry) {
return entry&_I86_PTE_FRAME;
}
unsigned char pt_entry_is_present (pt_entry entry) {
return ( (entry & _I86_PTE_PRESENT) > 0 );
}
unsigned char pt_entry_is_writable (pt_entry entry) {
return ( (entry & _I86_PTE_WRITABLE) > 0 );
}

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@ -1,27 +0,0 @@
#ifndef __PAGE_DIRECTORY_ENTRY_
#define __PAGE_DIRECTORY_ENTRY_
enum __PAGE_FLAGS {
_I86_PTE_PRESENT = 1,
_I86_PTE_WRITABLE = 2,
_I86_PTE_USER = 4,
_I86_PTE_WRITETHROUGH = 8,
_I86_PTE_NOT_CACHEABLE = 0x10,
_I86_PTE_ACCESSED = 0x20,
_I86_PTE_DIRTY = 0x40,
_I86_PTE_PAT = 0x80,
_I86_PTE_CPU_GLOBAL = 0x100,
_I86_PTE_LV4_GLOBAL = 0x200,
_I86_PTE_FRAME = 0x7FFFF000
};
typedef unsigned pt_entry;
extern void pt_entry_add_attrib (pt_entry* entry, unsigned mask);
extern void pt_entry_del_attrib (pt_entry* entry, unsigned mask);
extern void pt_entry_set_frame (pt_entry* entry, unsigned address);
extern unsigned pt_entry_get_frame (pt_entry entry);
extern unsigned char pt_entry_is_present (pt_entry entry);
extern unsigned char pt_entry_is_writable (pt_entry entry);
#endif

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@ -15,8 +15,11 @@ INPUT("loader.o",
"irq_asm.o",
"isrs.o",
"isrs_asm.o",
"mmngr_cr.o",
"mmngr.o",
"mmngr_de.o",
"mmngr_ph.o",
"mmngr_te.o",
"mmngr_vi.o",
"keyus.o",
"pic.o",
"pit.o",

BIN
SysCore/objects/mmngr_de.o Normal file

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SysCore/objects/mmngr_qs.o Normal file

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SysCore/objects/mmngr_te.o Normal file

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SysCore/objects/mmngr_vi.o Normal file

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@ -8,12 +8,9 @@ const char *apps_lst[] = {
"memory",
"help",
"cpu_info",
"mem_alloc", //0
"mem_free", //1
"mem_stat",
"mem_test", //2
"memstat"
};
int apps_count = 13;
int apps_count = 10;
@ -139,54 +136,6 @@ void apps_help(const int pn, const char* param[])
extern void detect_cpu();
void apps_memory_manager (const int function, const int pn, const char* param[])
{
switch (function) {
// Alloc
case 0:
{ unsigned int times = 1;
if (pn > 1 && strcmp(param[1], "times") == 0)
times = atoui(param[2]);
uint32_t temp;
for (; times > 0; times--) {
temp = (uint32_t) pmmngr_alloc_block();
if (temp == 0) {
printf ("Out of memory.\n");
break;
}
else printf ("New block allocated at address 0x%x\n", temp);
}
return;
}
// Free
case 1:
{ if (pn <= 1) {
printf ("Parameter missing: [address (hex)]\n");
return;
}
uint32_t temp = atox(param[1]);
pmmngr_free_block ((void*)temp);
printf ("Block containing address 0x%x now free.", temp);
return;
}
// Test
case 2:
{ if (pn <= 1) {
printf ("Parameter missing: [block number]");
return ; }
unsigned int temp = atoui(param[1]);
printf (pmmngr_test_block(temp) ? "Block %u is free.\n" : "Block %u is used.\n", temp);
}
}
}
void apps_memory_status()
{
printf ("Memory available: %u KB \n", pmmngr_get_memory_size ());

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@ -74,11 +74,7 @@ void shell()
case 6: apps_memory(params, (const char**)param); break;
case 7: apps_help(params, (const char**)param); break;
case 8: puts((char*)get_cpu_vender()); break;
case 9: apps_memory_manager (0, params, (const char**)param); break;
case 10: apps_memory_manager (1, params, (const char**)param); break;
case 11: apps_memory_status(); break;
case 12: apps_memory_manager (2, params, (const char**)param); break;
case 9: apps_memory_status(); break;
default: puts("Invalid function: "); puts(param[0]);
putc('\n');
break;

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@ -37,4 +37,5 @@ set djgpp_path=C:\DJGPP\bin
cd..
@echo ************************ Done ************************
@echo.
@echo.
@pause