CTAOS v3
This commit is contained in:
19
SysCore/hal/irq/compile.bat
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19
SysCore/hal/irq/compile.bat
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@echo off
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rem The name of the loader assembly file (without extension, must be .asm):
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set loader_name=loader
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rem NASM and DJGPP executable paths:
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set nasm_path=C:\nasm
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set djgpp_path=C:\DJGPP\bin
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set objpath=../../objects
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set incpath=../../include
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@echo on
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%nasm_path%\nasm.exe -f aout -o %objpath%/irq_asm.o irq.asm
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%djgpp_path%\gcc.exe -Wall -O -fstrength-reduce -fomit-frame-pointer -nostdinc -fno-builtin -I%incpath% -c -o %objpath%/irq.o irq.c
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@echo off
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@echo .
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@echo Done!
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@pause
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159
SysCore/hal/irq/irq.asm
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159
SysCore/hal/irq/irq.asm
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bits 32
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; !!! IRQ !!!
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global _i86_irq0
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global _i86_irq1
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global _i86_irq2
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global _i86_irq3
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global _i86_irq4
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global _i86_irq5
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global _i86_irq6
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global _i86_irq7
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global _i86_irq8
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global _i86_irq9
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global _i86_irq10
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global _i86_irq11
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global _i86_irq12
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global _i86_irq13
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global _i86_irq14
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global _i86_irq15
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; 32: IRQ0
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_i86_irq0:
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cli
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push byte 0
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push byte 32; Note that these don't push an error code on the stack:
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; We need to push a dummy error code
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jmp irq_common_stub
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; 33: IRQ1
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_i86_irq1:
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cli
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push byte 0
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push byte 33
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jmp irq_common_stub
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; 34: IRQ2
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_i86_irq2:
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cli
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push byte 0
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push byte 34
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jmp irq_common_stub
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; 35: IRQ3
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_i86_irq3:
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cli
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push byte 0
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push byte 35
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jmp irq_common_stub
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; 36: IRQ4
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_i86_irq4:
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cli
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push byte 0
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push byte 36
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jmp irq_common_stub
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; 37: IRQ5
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_i86_irq5:
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cli
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push byte 0
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push byte 37
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jmp irq_common_stub
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; 38: IRQ6
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_i86_irq6:
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cli
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push byte 0
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push byte 38
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jmp irq_common_stub
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; 39: IRQ7
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_i86_irq7:
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cli
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push byte 0
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push byte 39
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jmp irq_common_stub
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; 40: IRQ8
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_i86_irq8:
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cli
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push byte 0
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push byte 40
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jmp irq_common_stub
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; 41: IRQ9
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_i86_irq9:
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cli
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push byte 0
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push byte 41
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jmp irq_common_stub
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; 42: IRQ10
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_i86_irq10:
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cli
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push byte 0
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push byte 42
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jmp irq_common_stub
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; 43: IRQ11
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_i86_irq11:
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cli
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push byte 0
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push byte 43
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jmp irq_common_stub
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; 44: IRQ12
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_i86_irq12:
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cli
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push byte 0
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push byte 44
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jmp irq_common_stub
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; 45: IRQ13
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_i86_irq13:
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cli
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push byte 0
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push byte 45
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jmp irq_common_stub
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; 46: IRQ14
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_i86_irq14:
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cli
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push byte 0
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push byte 46
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jmp irq_common_stub
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; 47: IRQ15
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_i86_irq15:
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cli
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push byte 0
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push byte 47
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jmp irq_common_stub
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extern _i86_irq_handler
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; This is a stub that we have created for IRQ based ISRs. This calls
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; '_i86_irq_handler' in our C code. We need to create this in an 'irq.c'
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irq_common_stub:
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pusha
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push ds
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push es
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push fs
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push gs
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mov ax, 0x10
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov eax, esp
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push eax
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mov eax, _i86_irq_handler
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call eax
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pop eax
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pop gs
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pop fs
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pop es
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pop ds
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popa
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add esp, 8
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iret
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79
SysCore/hal/irq/irq.c
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79
SysCore/hal/irq/irq.c
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#include <system.h>
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#include "../idt/idt.h"
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#include "../pic/pic.h"
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#include "irq.h"
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/* This array is actually an array of function pointers. We use
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* this to handle custom IRQ handlers for a given IRQ */
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void *irq_routines[16] =
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{
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0
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};
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/* This installs a custom IRQ handler for the given IRQ */
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void i86_irq_install_handler (int irq, void (*handler)(ISR_stack_regs *r))
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{
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irq_routines[irq] = handler;
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}
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void i86_irq_uninstall_handler (int irq)
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{
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irq_routines[irq] = 0;
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}
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/* We first remap the interrupt controllers, and then we install
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* the appropriate ISRs to the correct entries in the IDT. This
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* is just like installing the exception handlers */
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void i86_irq_install()
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{
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i86_pic_remap(32,40);
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i86_idt_set_gate(32, (unsigned)i86_irq0, 0x08, 0x8E);
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i86_idt_set_gate(33, (unsigned)i86_irq1, 0x08, 0x8E);
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i86_idt_set_gate(34, (unsigned)i86_irq2, 0x08, 0x8E);
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i86_idt_set_gate(35, (unsigned)i86_irq3, 0x08, 0x8E);
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i86_idt_set_gate(36, (unsigned)i86_irq4, 0x08, 0x8E);
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i86_idt_set_gate(37, (unsigned)i86_irq5, 0x08, 0x8E);
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i86_idt_set_gate(38, (unsigned)i86_irq6, 0x08, 0x8E);
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i86_idt_set_gate(39, (unsigned)i86_irq7, 0x08, 0x8E);
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i86_idt_set_gate(40, (unsigned)i86_irq8, 0x08, 0x8E);
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i86_idt_set_gate(41, (unsigned)i86_irq9, 0x08, 0x8E);
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i86_idt_set_gate(42, (unsigned)i86_irq10, 0x08, 0x8E);
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i86_idt_set_gate(43, (unsigned)i86_irq11, 0x08, 0x8E);
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i86_idt_set_gate(44, (unsigned)i86_irq12, 0x08, 0x8E);
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i86_idt_set_gate(45, (unsigned)i86_irq13, 0x08, 0x8E);
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i86_idt_set_gate(46, (unsigned)i86_irq14, 0x08, 0x8E);
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i86_idt_set_gate(47, (unsigned)i86_irq15, 0x08, 0x8E);
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}
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/* Each of the IRQ ISRs point to this function, rather than
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* the 'fault_handler' in 'isrs.c'. The IRQ Controllers need
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* to be told when you are done servicing them, so you need
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* to send them an "End of Interrupt" command (0x20). There
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* are two 8259 chips: The first exists at 0x20, the second
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* exists at 0xA0. If the second controller (an IRQ from 8 to
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* 15) gets an interrupt, you need to acknowledge the
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* interrupt at BOTH controllers, otherwise, you only send
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* an EOI command to the first controller. If you don't send
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* an EOI, you won't raise any more IRQs */
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void i86_irq_handler (ISR_stack_regs *r)
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{
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/* This is a blank function pointer */
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void (*handler)(ISR_stack_regs *r);
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/* Find out if we have a custom handler to run for this
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* IRQ, and then finally, run it */
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handler = irq_routines[r->int_no - 32];
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if (handler) handler(r);
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/* If the IDT entry that was invoked was greater than 40
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* (meaning IRQ8 - 15), then we need to send an EOI to
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* the slave controller */
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if (r->int_no >=40) outportb(0x0A, 0x20);
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/* In either case, we need to send an EOI to the master
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* interrupt controller too */
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outportb(0x20, 0x20);
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}
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29
SysCore/hal/irq/irq.h
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29
SysCore/hal/irq/irq.h
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@ -0,0 +1,29 @@
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#ifndef __IRQ_H
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#define __IRQ_H
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/* These are own ISRs that point to our special IRQ handler
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* instead of the regular 'fault_handler' function */
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extern void i86_irq0();
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extern void i86_irq1();
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extern void i86_irq2();
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extern void i86_irq3();
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extern void i86_irq4();
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extern void i86_irq5();
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extern void i86_irq6();
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extern void i86_irq7();
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extern void i86_irq8();
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extern void i86_irq9();
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extern void i86_irq10();
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extern void i86_irq11();
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extern void i86_irq12();
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extern void i86_irq13();
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extern void i86_irq14();
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extern void i86_irq15();
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extern void i86_irq_install_handler (int irq, void (*handler)(ISR_stack_regs *r));
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extern void i86_irq_uninstall_handler (int irq);
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extern void i86_irq_install();
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extern void i86_irq_handler (ISR_stack_regs *r);
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#endif
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