80 lines
2.9 KiB
C
80 lines
2.9 KiB
C
#include <system.h>
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#include "../idt/idt.h"
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#include "../pic/pic.h"
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#include "irq.h"
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/* This array is actually an array of function pointers. We use
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* this to handle custom IRQ handlers for a given IRQ */
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void *irq_routines[16] =
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{
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0
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};
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/* This installs a custom IRQ handler for the given IRQ */
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void i86_irq_install_handler (int irq, void (*handler)(ISR_stack_regs *r))
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{
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irq_routines[irq] = handler;
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}
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void i86_irq_uninstall_handler (int irq)
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{
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irq_routines[irq] = 0;
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}
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/* We first remap the interrupt controllers, and then we install
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* the appropriate ISRs to the correct entries in the IDT. This
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* is just like installing the exception handlers */
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void i86_irq_install()
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{
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i86_pic_remap(32,40);
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i86_idt_set_gate(32, (unsigned)i86_irq0, 0x08, 0x8E);
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i86_idt_set_gate(33, (unsigned)i86_irq1, 0x08, 0x8E);
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i86_idt_set_gate(34, (unsigned)i86_irq2, 0x08, 0x8E);
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i86_idt_set_gate(35, (unsigned)i86_irq3, 0x08, 0x8E);
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i86_idt_set_gate(36, (unsigned)i86_irq4, 0x08, 0x8E);
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i86_idt_set_gate(37, (unsigned)i86_irq5, 0x08, 0x8E);
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i86_idt_set_gate(38, (unsigned)i86_irq6, 0x08, 0x8E);
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i86_idt_set_gate(39, (unsigned)i86_irq7, 0x08, 0x8E);
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i86_idt_set_gate(40, (unsigned)i86_irq8, 0x08, 0x8E);
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i86_idt_set_gate(41, (unsigned)i86_irq9, 0x08, 0x8E);
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i86_idt_set_gate(42, (unsigned)i86_irq10, 0x08, 0x8E);
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i86_idt_set_gate(43, (unsigned)i86_irq11, 0x08, 0x8E);
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i86_idt_set_gate(44, (unsigned)i86_irq12, 0x08, 0x8E);
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i86_idt_set_gate(45, (unsigned)i86_irq13, 0x08, 0x8E);
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i86_idt_set_gate(46, (unsigned)i86_irq14, 0x08, 0x8E);
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i86_idt_set_gate(47, (unsigned)i86_irq15, 0x08, 0x8E);
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}
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/* Each of the IRQ ISRs point to this function, rather than
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* the 'fault_handler' in 'isrs.c'. The IRQ Controllers need
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* to be told when you are done servicing them, so you need
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* to send them an "End of Interrupt" command (0x20). There
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* are two 8259 chips: The first exists at 0x20, the second
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* exists at 0xA0. If the second controller (an IRQ from 8 to
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* 15) gets an interrupt, you need to acknowledge the
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* interrupt at BOTH controllers, otherwise, you only send
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* an EOI command to the first controller. If you don't send
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* an EOI, you won't raise any more IRQs */
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void i86_irq_handler (ISR_stack_regs *r)
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{
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/* This is a blank function pointer */
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void (*handler)(ISR_stack_regs *r);
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/* Find out if we have a custom handler to run for this
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* IRQ, and then finally, run it */
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handler = irq_routines[r->int_no - 32];
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if (handler) handler(r);
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/* If the IDT entry that was invoked was greater than 40
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* (meaning IRQ8 - 15), then we need to send an EOI to
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* the slave controller */
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if (r->int_no >=40) outportb(0x0A, 0x20);
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/* In either case, we need to send an EOI to the master
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* interrupt controller too */
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outportb(0x20, 0x20);
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}
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