Tiberiu Chibici
913e65b856
==================================================== + Changed 'align 0x4' line above multiboot header in loader.asm to 'align 4' + Removed -e option for echo in build.sh + Modified build.sh for linux + Fixed triple fault when enabling paging + Fixed page faults at memory manager initialization + Fixed 'mem' console function + Added more info about page fault at crash screen + Added Panic() macro + Added verbose mode for memory manager [ BAD] BUILD 0.1.0.390 DATE 8/27/2011 AT 10:54 PM ==================================================== + Added stdlib routines, separated in different files + Rewritten physical memory manager + Added virtual mem manager + Added memory allocation/freeing + Added memory library + Added temporary allocation (at end of kernel), until paging is started - Removed functionality from debug console function 'mem' - Removed system.h, the one remaining function now in stdio.h
81 lines
2.0 KiB
C
81 lines
2.0 KiB
C
/*
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* dma.h
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*
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* Created on: Aug 20, 2011
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* Author: Tiberiu
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*/
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#ifndef DMA_H_
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#define DMA_H_
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#include <types.h>
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enum DmaRegisters
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{
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DmaRegisterStatus = 0x08,
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DmaRegisterCommand = 0x08,
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DmaRegisterRequest = 0x09,
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DmaRegisterSingleChannelMask = 0x0A,
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DmaRegisterMode = 0x0B,
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DmaRegisterFlipFlopReset = 0x0C,
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DmaRegisterIntermediate = 0x0D,
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DmaRegisterMasterReset = 0x0D,
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DmaRegisterMaskReset = 0x0E,
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DmaRegisterMultichannelMask = 0x0F,
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DmaRegisterChannel0Address = 0x00,
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DmaRegisterChannel1Address = 0x02,
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DmaRegisterChannel2Address = 0x04,
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DmaRegisterChannel3Address = 0x06,
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DmaRegisterChannel4Address = 0xC0,
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DmaRegisterChannel5Address = 0xC4,
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DmaRegisterChannel6Address = 0xC8,
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DmaRegisterChannel7Address = 0xCC,
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DmaRegisterChannel0Count = 0x01,
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DmaRegisterChannel1Count = 0x03,
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DmaRegisterChannel2Count = 0x05,
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DmaRegisterChannel3Count = 0x07,
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DmaRegisterChannel4Count = 0xC2,
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DmaRegisterChannel5Count = 0xC6,
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DmaRegisterChannel6Count = 0xCA,
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DmaRegisterChannel7Count = 0xCE,
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DmaRegisterChannel1PageAddress = 0x83,
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DmaRegisterChannel2PageAddress = 0x81,
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DmaRegisterChannel3PageAddress = 0x82,
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DmaRegisterChannel5PageAddress = 0x8B,
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DmaRegisterChannel6PageAddress = 0x89,
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DmaRegisterChannel7PageAddress = 0x8A
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};
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enum DmaModes
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{
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DmaModeChannelMask = 0x3,
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DmaModeSelfTest = 0,
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DmaModeWrite = 0x8,
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DmaModeRead = 0x4,
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DmaModeAutoReinit = 0x10,
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DmaModeDown = 0x20,
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DmaModeTransferOnDemand = 0,
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DmaModeTransferSingleDma = 0x40,
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DmaModeTransferBlockDma = 0x80,
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DmaModeTransferCascade = 0xC0
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};
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extern void DmaSetAddress (uint8 channel, uint8 low, uint8 high);
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extern void DmaSetCount (uint8 channel, uint8 low, uint8 high);
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extern void DmaSetExternalPageRegisters (uint8 channel, uint8 val);
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extern void DmaSetMode (uint8 channel, uint8 mode);
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extern void DmaResetFlipFlop (uint8 channel);
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extern void DmaReset ();
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extern void DmaMaskChannel(uint8 channel);
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extern void DmaUnmaskChannel (uint8 channel);
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extern void DmaUnmaskAll ();
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#endif /* DMA_H_ */
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