[GOOD] BUILD 0.1.0.450 DATE 8/29/2011 AT 10:30 AM
==================================================== + Changed 'align 0x4' line above multiboot header in loader.asm to 'align 4' + Removed -e option for echo in build.sh + Modified build.sh for linux + Fixed triple fault when enabling paging + Fixed page faults at memory manager initialization + Fixed 'mem' console function + Added more info about page fault at crash screen + Added Panic() macro + Added verbose mode for memory manager [ BAD] BUILD 0.1.0.390 DATE 8/27/2011 AT 10:54 PM ==================================================== + Added stdlib routines, separated in different files + Rewritten physical memory manager + Added virtual mem manager + Added memory allocation/freeing + Added memory library + Added temporary allocation (at end of kernel), until paging is started - Removed functionality from debug console function 'mem' - Removed system.h, the one remaining function now in stdio.h
This commit is contained in:
23
Kernel/hal/cpu/gdt-asm.asm
Normal file
23
Kernel/hal/cpu/gdt-asm.asm
Normal file
@@ -0,0 +1,23 @@
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; GLOBAL DESCRIPTOR TABLE
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;
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;
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bits 32
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; !!! GDT !!!
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; This will set up our new segment registers. We need to do
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; something special in order to set CS. We do what is called a
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; far jump. A jump that includes a segment as well as an offset.
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global GdtFlush ; Allows the C code to link to this
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extern gp ; Says that 'gp' is in another file
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GdtFlush:
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lgdt [gp] ; Load the GDT with our 'gp' which is a special pointer
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mov ax, 0x10 ; 0x10 is the offset in the GDT to our data segment
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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jmp 0x08:flush2 ; 0x08 is the offset to our code segment: Far jump!
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flush2:
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ret ; Returns back to the C code!
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74
Kernel/hal/cpu/gdt.c
Normal file
74
Kernel/hal/cpu/gdt.c
Normal file
@@ -0,0 +1,74 @@
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/******************************************************************
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* gdt.c - GLOBAL DESCRIPTOR TABLE *
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* Contains function prototypes for setting up the GDT *
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******************************************************************/
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#define MAX_DESCRIPTORS 5
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#include "gdt.h"
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/* Our GDT, with 3 entries, and finally our special GDT pointer */
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struct GdtEntry gdt[MAX_DESCRIPTORS];
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struct GdtPointer gp;
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/* Setup a descriptor in the Global Descriptor Table */
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void GdtSetGate(int num, unsigned long base, unsigned long limit, unsigned char access, unsigned char gran)
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{
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/* Sanity check */
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if (num >= MAX_DESCRIPTORS) return;
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/* Setup the descriptor base address */
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gdt[num].base_low = (base & 0xFFFF);
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gdt[num].base_middle = (base >> 16) & 0xFF;
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gdt[num].base_high = (base >> 24) & 0xFF;
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/* Setup the descriptor limits */
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gdt[num].limit_low = (limit & 0xFFFF);
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gdt[num].granularity = ((limit >> 16) & 0x0F);
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/* Finally, set up the granularity and access flags */
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gdt[num].granularity |= (gran & 0xF0);
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gdt[num].access = access;
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}
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struct GdtEntry* GdtGetGate(int num)
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{
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if (num>MAX_DESCRIPTORS) return 0;
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return &gdt[num];
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}
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/* Should be called by main. This will setup the special GDT
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* pointer, set up the first 3 entries in our GDT, and then
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* finally call gdt_flush() in our assembler file in order
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* to tell the processor where the new GDT is and update the
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* new segment registers */
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void GdtInstall()
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{
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/* Setup the GDT pointer and limit */
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gp.limit = (sizeof(struct GdtEntry) * 3) - 1;
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gp.base = (unsigned int)&gdt;
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/* Our NULL descriptor */
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GdtSetGate(0, 0, 0, 0, 0);
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/* The second entry is our Code Segment. The base address
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* is 0, the limit is 4GBytes, it uses 4KByte granularity,
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* uses 32-bit opcodes, and is a Code Segment descriptor.
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* Please check the table above in the tutorial in order
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* to see exactly what each value means */
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GdtSetGate(1, 0, 0xFFFFFFFF, 0x9A, 0xCF);
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/* The third entry is our Data Segment. It's EXACTLY the
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* same as our code segment, but the descriptor type in
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* this entry's access byte says it's a Data Segment */
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GdtSetGate(2, 0, 0xFFFFFFFF, 0x92, 0xCF);
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/* User mode Code segment*/
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GdtSetGate(3, 0, 0xFFFFFFFF, 0xFA, 0xCF);
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/* User mode data segment*/
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GdtSetGate(4, 0, 0xFFFFFFFF, 0xF2, 0xCF);
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/* Flush out the old GDT and install the new changes! */
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GdtFlush();
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}
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38
Kernel/hal/cpu/gdt.h
Normal file
38
Kernel/hal/cpu/gdt.h
Normal file
@@ -0,0 +1,38 @@
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/******************************************************************
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* gdt.h - GLOBAL DESCRIPTOR TABLE *
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* Contains structures and function declarations for GDT *
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******************************************************************/
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#ifndef __GDT_H
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#define __GDT_H
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/* Defines a GDT entry. We say packed, because it prevents the
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* compiler from doing things that it thinks is best: Prevent
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* compiler "optimization" by packing */
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struct GdtEntry
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{
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unsigned short limit_low;
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unsigned short base_low;
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unsigned char base_middle;
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unsigned char access;
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unsigned char granularity;
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unsigned char base_high;
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} __attribute__((packed));
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/* Special pointer which includes the limit: The max bytes
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* taken up by the GDT, minus 1. Again, this NEEDS to be packed */
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struct GdtPointer
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{
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unsigned short limit;
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unsigned int base;
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} __attribute__((packed));
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/* This will be a function in start.asm. We use this to properly
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* reload the new segment registers */
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extern void GdtInstall();
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extern void GdtFlush();
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extern void GdtSetGate(int num, unsigned long base, unsigned long limit, unsigned char access, unsigned char gran);
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extern struct GdtEntry* GdtGetGate(int num);
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#endif
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9
Kernel/hal/cpu/idt-asm.asm
Normal file
9
Kernel/hal/cpu/idt-asm.asm
Normal file
@@ -0,0 +1,9 @@
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bits 32
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; !!! IDT !!!
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; Loads the IDT defined in '_idtp'
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global IdtLoad
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extern idtp
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IdtLoad:
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lidt [idtp]
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ret
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45
Kernel/hal/cpu/idt.c
Normal file
45
Kernel/hal/cpu/idt.c
Normal file
@@ -0,0 +1,45 @@
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/******************************************************************
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* idt.h - INTERRUPT DESCRIPTOR TABLE *
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* Contains structures and function declarations for IDT *
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******************************************************************/
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#include <stdlib.h>
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#include "idt.h"
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extern void IdtLoad();
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/* Declare an IDT of 256 entries. */
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struct IdtEntry idt[256];
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struct IdtPointer idtp;
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/* Use this function to set an entry in the IDT. Alot simpler
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* than twiddling with the GDT ;) */
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void IdtSetGate(unsigned char num, unsigned long base, unsigned short sel, unsigned char flags)
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{
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/* The interrupt routine's base address */
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idt[num].base_lo = (base & 0xFFFF);
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idt[num].base_hi = (base >> 16) & 0xFFFF;
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/* The segment or 'selector' that this IDT entry will use
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* is set here, along with any access flags */
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idt[num].sel = sel;
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idt[num].always0 = 0;
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idt[num].flags = flags;
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}
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struct IdtEntry* IdtGetGate(unsigned char num)
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{
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return &idt[num];
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}
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/* Installs the IDT */
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void IdtInstall()
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{
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/* Sets the special IDT pointer up, just like in 'gdt.c' */
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idtp.limit = (sizeof (struct IdtEntry) * 256) - 1;
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idtp.base = (unsigned int)&idt;
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/* Clear out the entire IDT, initializing it to zeros */
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memset (&idt, 0, sizeof(struct IdtEntry) * 256);
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/* Points the processor's internal register to the new IDT */
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IdtLoad();
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}
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31
Kernel/hal/cpu/idt.h
Normal file
31
Kernel/hal/cpu/idt.h
Normal file
@@ -0,0 +1,31 @@
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/******************************************************************
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* idt.h - INTERRUPT DESCRIPTOR TABLE *
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* Contains structures and function declarations for IDT *
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******************************************************************/
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#ifndef __IDT_H
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#define __IDT_H
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/* Defines an IDT entry */
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struct IdtEntry
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{
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unsigned short base_lo;
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unsigned short sel;
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unsigned char always0;
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unsigned char flags;
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unsigned short base_hi;
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} __attribute__((packed));
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struct IdtPointer
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{
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unsigned short limit;
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unsigned int base;
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} __attribute__((packed));
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/* This exists in 'start.asm', and is used to load our IDT */
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extern void IdtSetGate(unsigned char num, unsigned long base, unsigned short sel, unsigned char flags);
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extern struct IdtEntry* IdtGetGate(unsigned char num);
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extern void IdtInstall();
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#endif
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159
Kernel/hal/cpu/irq-asm.asm
Normal file
159
Kernel/hal/cpu/irq-asm.asm
Normal file
@@ -0,0 +1,159 @@
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bits 32
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; !!! IRQ !!!
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global Irq_0
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global Irq_1
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global Irq_2
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global Irq_3
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global Irq_4
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global Irq_5
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global Irq_6
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global Irq_7
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global Irq_8
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global Irq_9
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global Irq_10
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global Irq_11
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global Irq_12
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global Irq_13
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global Irq_14
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global Irq_15
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; 32: IRQ0
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Irq_0:
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cli
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push byte 0
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push byte 32; Note that these don't push an error code on the stack:
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; We need to push a dummy error code
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jmp irq_common_stub
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; 33: IRQ1
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Irq_1:
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cli
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push byte 0
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push byte 33
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jmp irq_common_stub
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; 34: IRQ2
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Irq_2:
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cli
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push byte 0
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push byte 34
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jmp irq_common_stub
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; 35: IRQ3
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Irq_3:
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cli
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push byte 0
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push byte 35
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jmp irq_common_stub
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; 36: IRQ4
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Irq_4:
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cli
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push byte 0
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push byte 36
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jmp irq_common_stub
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; 37: IRQ5
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Irq_5:
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cli
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push byte 0
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push byte 37
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jmp irq_common_stub
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; 38: IRQ6
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Irq_6:
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cli
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push byte 0
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push byte 38
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jmp irq_common_stub
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; 39: IRQ7
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Irq_7:
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cli
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push byte 0
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push byte 39
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jmp irq_common_stub
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; 40: IRQ8
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Irq_8:
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cli
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push byte 0
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push byte 40
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jmp irq_common_stub
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; 41: IRQ9
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Irq_9:
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cli
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push byte 0
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push byte 41
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jmp irq_common_stub
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; 42: IRQ10
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Irq_10:
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cli
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push byte 0
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push byte 42
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jmp irq_common_stub
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; 43: IRQ11
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Irq_11:
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cli
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push byte 0
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push byte 43
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jmp irq_common_stub
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; 44: IRQ12
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Irq_12:
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cli
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push byte 0
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push byte 44
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jmp irq_common_stub
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; 45: IRQ13
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||||
Irq_13:
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cli
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push byte 0
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||||
push byte 45
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jmp irq_common_stub
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||||
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||||
; 46: IRQ14
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Irq_14:
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cli
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||||
push byte 0
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||||
push byte 46
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||||
jmp irq_common_stub
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||||
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||||
; 47: IRQ15
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||||
Irq_15:
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||||
cli
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||||
push byte 0
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||||
push byte 47
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||||
jmp irq_common_stub
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||||
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||||
extern IrqHandler
|
||||
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||||
; This is a stub that we have created for IRQ based ISRs. This calls
|
||||
; 'Irq__handler' in our C code. We need to create this in an 'irq.c'
|
||||
irq_common_stub:
|
||||
pusha
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||||
push ds
|
||||
push es
|
||||
push fs
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||||
push gs
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||||
mov ax, 0x10
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||||
mov ds, ax
|
||||
mov es, ax
|
||||
mov fs, ax
|
||||
mov gs, ax
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||||
mov eax, esp
|
||||
push eax
|
||||
mov eax, IrqHandler
|
||||
call eax
|
||||
pop eax
|
||||
pop gs
|
||||
pop fs
|
||||
pop es
|
||||
pop ds
|
||||
popa
|
||||
add esp, 8
|
||||
iret
|
||||
91
Kernel/hal/cpu/irq.c
Normal file
91
Kernel/hal/cpu/irq.c
Normal file
@@ -0,0 +1,91 @@
|
||||
#include <stdio.h>
|
||||
#include "pic.h"
|
||||
#include "irq.h"
|
||||
#include "idt.h"
|
||||
|
||||
/* These are own ISRs that point to our special IRQ handler
|
||||
* instead of the regular 'fault_handler' function */
|
||||
extern void Irq_0();
|
||||
extern void Irq_1();
|
||||
extern void Irq_2();
|
||||
extern void Irq_3();
|
||||
extern void Irq_4();
|
||||
extern void Irq_5();
|
||||
extern void Irq_6();
|
||||
extern void Irq_7();
|
||||
extern void Irq_8();
|
||||
extern void Irq_9();
|
||||
extern void Irq_10();
|
||||
extern void Irq_11();
|
||||
extern void Irq_12();
|
||||
extern void Irq_13();
|
||||
extern void Irq_14();
|
||||
extern void Irq_15();
|
||||
|
||||
/* This array is actually an array of function pointers. We use
|
||||
* this to handle custom IRQ handlers for a given IRQ */
|
||||
void *IrqRoutines[16] =
|
||||
{
|
||||
0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0
|
||||
};
|
||||
|
||||
/* This installs a custom IRQ handler for the given IRQ */
|
||||
void IrqInstallHandler (int irq, void (*handler)(_RegsStack32 *r))
|
||||
{
|
||||
IrqRoutines[irq] = handler;
|
||||
}
|
||||
|
||||
void IrqUninstallHandler (int irq)
|
||||
{
|
||||
IrqRoutines[irq] = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* We first remap the interrupt controllers, and then we install
|
||||
* the appropriate ISRs to the correct entries in the IDT. This
|
||||
* is just like installing the exception handlers */
|
||||
void IrqInstall()
|
||||
{
|
||||
PicRemap(32,40);
|
||||
|
||||
IdtSetGate(32, (unsigned)Irq_0, 0x08, 0x8E);
|
||||
IdtSetGate(33, (unsigned)Irq_1, 0x08, 0x8E);
|
||||
IdtSetGate(34, (unsigned)Irq_2, 0x08, 0x8E);
|
||||
IdtSetGate(35, (unsigned)Irq_3, 0x08, 0x8E);
|
||||
IdtSetGate(36, (unsigned)Irq_4, 0x08, 0x8E);
|
||||
IdtSetGate(37, (unsigned)Irq_5, 0x08, 0x8E);
|
||||
IdtSetGate(38, (unsigned)Irq_6, 0x08, 0x8E);
|
||||
IdtSetGate(39, (unsigned)Irq_7, 0x08, 0x8E);
|
||||
IdtSetGate(40, (unsigned)Irq_8, 0x08, 0x8E);
|
||||
IdtSetGate(41, (unsigned)Irq_9, 0x08, 0x8E);
|
||||
IdtSetGate(42, (unsigned)Irq_10, 0x08, 0x8E);
|
||||
IdtSetGate(43, (unsigned)Irq_11, 0x08, 0x8E);
|
||||
IdtSetGate(44, (unsigned)Irq_12, 0x08, 0x8E);
|
||||
IdtSetGate(45, (unsigned)Irq_13, 0x08, 0x8E);
|
||||
IdtSetGate(46, (unsigned)Irq_14, 0x08, 0x8E);
|
||||
IdtSetGate(47, (unsigned)Irq_15, 0x08, 0x8E);
|
||||
}
|
||||
|
||||
// Default IRQ handler, launches other handler if installed.
|
||||
// Also sends end-of-interrupt messages to PIC
|
||||
void IrqHandler (_RegsStack32 *r)
|
||||
{
|
||||
/* This is a blank function pointer */
|
||||
void (*handler)(_RegsStack32 *r);
|
||||
|
||||
/* Find out if we have a custom handler to run for this
|
||||
* IRQ, and then finally, run it */
|
||||
handler = IrqRoutines[r->int_no - 32];
|
||||
if (handler) handler(r);
|
||||
|
||||
/* If the IDT entry that was invoked was greater than 40
|
||||
* (meaning IRQ8 - 15), then we need to send an EOI to
|
||||
* the slave controller */
|
||||
if (r->int_no >=40) outportb(0xA0, 0x20);
|
||||
|
||||
/* In either case, we need to send an EOI to the master
|
||||
* interrupt controller too */
|
||||
outportb(0x20, 0x20);
|
||||
}
|
||||
10
Kernel/hal/cpu/irq.h
Normal file
10
Kernel/hal/cpu/irq.h
Normal file
@@ -0,0 +1,10 @@
|
||||
#ifndef __IRQ_H
|
||||
#define __IRQ_H
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
extern void IrqInstallHandler (int irq, void (*handler)(_RegsStack32 *r));
|
||||
extern void IrqUninstallHandler (int irq);
|
||||
extern void IrqInstall();
|
||||
|
||||
#endif
|
||||
217
Kernel/hal/cpu/isrs-asm.asm
Normal file
217
Kernel/hal/cpu/isrs-asm.asm
Normal file
@@ -0,0 +1,217 @@
|
||||
bits 32
|
||||
|
||||
; !!! ISRs !!!
|
||||
global isr_exception_0
|
||||
global isr_exception_1
|
||||
global isr_exception_2
|
||||
global isr_exception_3
|
||||
global isr_exception_4
|
||||
global isr_exception_5
|
||||
global isr_exception_6
|
||||
global isr_exception_7
|
||||
global isr_exception_8
|
||||
global isr_exception_9
|
||||
global isr_exception_10
|
||||
global isr_exception_11
|
||||
global isr_exception_12
|
||||
global isr_exception_13
|
||||
global isr_exception_14
|
||||
global isr_exception_15
|
||||
global isr_exception_16
|
||||
global isr_exception_17
|
||||
global isr_exception_18
|
||||
global isr_exception_19
|
||||
global isr_exception_20
|
||||
global isr_exception_21
|
||||
global isr_exception_22
|
||||
global isr_exception_23
|
||||
global isr_exception_24
|
||||
global isr_exception_25
|
||||
global isr_exception_26
|
||||
global isr_exception_27
|
||||
global isr_exception_28
|
||||
global isr_exception_29
|
||||
global isr_exception_30
|
||||
global isr_exception_31
|
||||
|
||||
isr_exception_0:
|
||||
cli
|
||||
push byte 0; A normal ISR stub that pops a dummy error code to keep a
|
||||
; uniform stack frame
|
||||
push byte 0
|
||||
jmp isr_common_stub
|
||||
isr_exception_1:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 1
|
||||
jmp isr_common_stub
|
||||
isr_exception_2:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 2
|
||||
jmp isr_common_stub
|
||||
isr_exception_3:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 3
|
||||
jmp isr_common_stub
|
||||
isr_exception_4:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 4
|
||||
jmp isr_common_stub
|
||||
isr_exception_5:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 5
|
||||
jmp isr_common_stub
|
||||
isr_exception_6:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 6
|
||||
jmp isr_common_stub
|
||||
isr_exception_7:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 7
|
||||
jmp isr_common_stub
|
||||
isr_exception_8:
|
||||
cli
|
||||
push byte 8
|
||||
jmp isr_common_stub
|
||||
isr_exception_9:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 9
|
||||
jmp isr_common_stub
|
||||
isr_exception_10:
|
||||
cli
|
||||
push byte 10
|
||||
jmp isr_common_stub
|
||||
isr_exception_11:
|
||||
cli
|
||||
push byte 11
|
||||
jmp isr_common_stub
|
||||
isr_exception_12:
|
||||
cli
|
||||
push byte 12
|
||||
jmp isr_common_stub
|
||||
isr_exception_13:
|
||||
cli
|
||||
push byte 13
|
||||
jmp isr_common_stub
|
||||
isr_exception_14:
|
||||
cli
|
||||
push byte 14
|
||||
jmp isr_common_stub
|
||||
isr_exception_15:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 15
|
||||
jmp isr_common_stub
|
||||
isr_exception_16:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 16
|
||||
jmp isr_common_stub
|
||||
isr_exception_17:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 17
|
||||
jmp isr_common_stub
|
||||
isr_exception_18:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 18
|
||||
jmp isr_common_stub
|
||||
isr_exception_19:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 19
|
||||
jmp isr_common_stub
|
||||
isr_exception_20:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 20
|
||||
jmp isr_common_stub
|
||||
isr_exception_21:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 21
|
||||
jmp isr_common_stub
|
||||
isr_exception_22:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 22
|
||||
jmp isr_common_stub
|
||||
isr_exception_23:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 23
|
||||
jmp isr_common_stub
|
||||
isr_exception_24:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 24
|
||||
jmp isr_common_stub
|
||||
isr_exception_25:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 25
|
||||
jmp isr_common_stub
|
||||
isr_exception_26:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 26
|
||||
jmp isr_common_stub
|
||||
isr_exception_27:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 27
|
||||
jmp isr_common_stub
|
||||
isr_exception_28:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 28
|
||||
jmp isr_common_stub
|
||||
isr_exception_29:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 29
|
||||
jmp isr_common_stub
|
||||
isr_exception_30:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 30
|
||||
jmp isr_common_stub
|
||||
isr_exception_31:
|
||||
cli
|
||||
push byte 0
|
||||
push byte 31
|
||||
jmp isr_common_stub
|
||||
|
||||
extern IsrsFaultHandler
|
||||
|
||||
isr_common_stub:
|
||||
pusha
|
||||
push ds
|
||||
push es
|
||||
push fs
|
||||
push gs
|
||||
mov ax, 0x10 ; Load the Kernel Data Segment descriptor!
|
||||
mov ds, ax
|
||||
mov es, ax
|
||||
mov fs, ax
|
||||
mov gs, ax
|
||||
mov eax, esp ; Push us the stack
|
||||
push eax
|
||||
mov eax, IsrsFaultHandler
|
||||
call eax ; A special call, preserves the 'eip' register
|
||||
pop eax
|
||||
pop gs
|
||||
pop fs
|
||||
pop es
|
||||
pop ds
|
||||
popa
|
||||
add esp, 8 ; Cleans up the pushed error code and pushed ISR number
|
||||
iret ; pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP!
|
||||
114
Kernel/hal/cpu/isrs.c
Normal file
114
Kernel/hal/cpu/isrs.c
Normal file
@@ -0,0 +1,114 @@
|
||||
#include <debugio.h>
|
||||
|
||||
#include "isrs.h"
|
||||
#include "idt.h"
|
||||
|
||||
// Assembly coded
|
||||
extern void isr_exception_0();
|
||||
extern void isr_exception_1();
|
||||
extern void isr_exception_2();
|
||||
extern void isr_exception_3();
|
||||
extern void isr_exception_4();
|
||||
extern void isr_exception_5();
|
||||
extern void isr_exception_6();
|
||||
extern void isr_exception_7();
|
||||
extern void isr_exception_8();
|
||||
extern void isr_exception_9();
|
||||
extern void isr_exception_10();
|
||||
extern void isr_exception_11();
|
||||
extern void isr_exception_12();
|
||||
extern void isr_exception_13();
|
||||
extern void isr_exception_14();
|
||||
extern void isr_exception_15();
|
||||
extern void isr_exception_16();
|
||||
extern void isr_exception_17();
|
||||
extern void isr_exception_18();
|
||||
extern void isr_exception_19();
|
||||
extern void isr_exception_20();
|
||||
extern void isr_exception_21();
|
||||
extern void isr_exception_22();
|
||||
extern void isr_exception_23();
|
||||
extern void isr_exception_24();
|
||||
extern void isr_exception_25();
|
||||
extern void isr_exception_26();
|
||||
extern void isr_exception_27();
|
||||
extern void isr_exception_28();
|
||||
extern void isr_exception_29();
|
||||
extern void isr_exception_30();
|
||||
extern void isr_exception_31();
|
||||
|
||||
|
||||
void* IdtFaultHandlers[32] = {
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
};
|
||||
|
||||
void IsrsInstall()
|
||||
{
|
||||
IdtSetGate(0, (unsigned)isr_exception_0, 0x08, 0x8E);
|
||||
IdtSetGate(1, (unsigned)isr_exception_1, 0x08, 0x8E);
|
||||
IdtSetGate(2, (unsigned)isr_exception_2, 0x08, 0x8E);
|
||||
IdtSetGate(3, (unsigned)isr_exception_3, 0x08, 0x8E);
|
||||
IdtSetGate(4, (unsigned)isr_exception_4, 0x08, 0x8E);
|
||||
IdtSetGate(5, (unsigned)isr_exception_5, 0x08, 0x8E);
|
||||
IdtSetGate(6, (unsigned)isr_exception_6, 0x08, 0x8E);
|
||||
IdtSetGate(7, (unsigned)isr_exception_7, 0x08, 0x8E);
|
||||
IdtSetGate(8, (unsigned)isr_exception_8, 0x08, 0x8E);
|
||||
IdtSetGate(9, (unsigned)isr_exception_9, 0x08, 0x8E);
|
||||
IdtSetGate(10, (unsigned)isr_exception_10, 0x08, 0x8E);
|
||||
IdtSetGate(11, (unsigned)isr_exception_11, 0x08, 0x8E);
|
||||
IdtSetGate(12, (unsigned)isr_exception_12, 0x08, 0x8E);
|
||||
IdtSetGate(13, (unsigned)isr_exception_13, 0x08, 0x8E);
|
||||
IdtSetGate(14, (unsigned)isr_exception_14, 0x08, 0x8E);
|
||||
IdtSetGate(15, (unsigned)isr_exception_15, 0x08, 0x8E);
|
||||
IdtSetGate(16, (unsigned)isr_exception_16, 0x08, 0x8E);
|
||||
IdtSetGate(17, (unsigned)isr_exception_17, 0x08, 0x8E);
|
||||
IdtSetGate(18, (unsigned)isr_exception_18, 0x08, 0x8E);
|
||||
IdtSetGate(19, (unsigned)isr_exception_19, 0x08, 0x8E);
|
||||
IdtSetGate(20, (unsigned)isr_exception_20, 0x08, 0x8E);
|
||||
IdtSetGate(21, (unsigned)isr_exception_21, 0x08, 0x8E);
|
||||
IdtSetGate(22, (unsigned)isr_exception_22, 0x08, 0x8E);
|
||||
IdtSetGate(23, (unsigned)isr_exception_23, 0x08, 0x8E);
|
||||
IdtSetGate(24, (unsigned)isr_exception_24, 0x08, 0x8E);
|
||||
IdtSetGate(25, (unsigned)isr_exception_25, 0x08, 0x8E);
|
||||
IdtSetGate(26, (unsigned)isr_exception_26, 0x08, 0x8E);
|
||||
IdtSetGate(27, (unsigned)isr_exception_27, 0x08, 0x8E);
|
||||
IdtSetGate(28, (unsigned)isr_exception_28, 0x08, 0x8E);
|
||||
IdtSetGate(29, (unsigned)isr_exception_29, 0x08, 0x8E);
|
||||
IdtSetGate(30, (unsigned)isr_exception_30, 0x08, 0x8E);
|
||||
IdtSetGate(31, (unsigned)isr_exception_31, 0x08, 0x8E);
|
||||
}
|
||||
|
||||
|
||||
void IsrsInstallHandler(int interr, void (*function)(_RegsStack32 *r))
|
||||
{
|
||||
if (interr < 32) IdtFaultHandlers[interr] = function;
|
||||
}
|
||||
|
||||
|
||||
void IsrsUninstallHandler(int interr)
|
||||
{
|
||||
if (interr < 32) IdtFaultHandlers[interr] = 0;
|
||||
}
|
||||
|
||||
|
||||
extern void CrashMessage(_RegsStack32 *r);
|
||||
// Default fault handler; calls other handlers, or displays error message.
|
||||
void IsrsFaultHandler(_RegsStack32 *r)
|
||||
{
|
||||
/* Is this a fault whose number is from 0 to 31? */
|
||||
if (r->int_no < 32)
|
||||
{
|
||||
void (*func)(_RegsStack32 *r);
|
||||
func = IdtFaultHandlers[r->int_no];
|
||||
|
||||
// Halt system if unhandled
|
||||
if (!func) {
|
||||
CrashMessage(r);
|
||||
asm ("cli");
|
||||
asm ("hlt");
|
||||
}
|
||||
|
||||
else (*func)(r);
|
||||
}
|
||||
}
|
||||
10
Kernel/hal/cpu/isrs.h
Normal file
10
Kernel/hal/cpu/isrs.h
Normal file
@@ -0,0 +1,10 @@
|
||||
#ifndef __ISRS_H_
|
||||
#define __ISRS_H_
|
||||
|
||||
#include <types.h>
|
||||
|
||||
extern void IsrsInstall();
|
||||
extern void IsrsInstallHandler(int interr, void (*function)(_RegsStack32 *r));
|
||||
extern void IsrsUninstallHandler(int interr);
|
||||
|
||||
#endif
|
||||
23
Kernel/hal/cpu/pic.c
Normal file
23
Kernel/hal/cpu/pic.c
Normal file
@@ -0,0 +1,23 @@
|
||||
#include <stdio.h>
|
||||
#include "pic.h"
|
||||
|
||||
void PicRemap(int pic1, int pic2)
|
||||
{
|
||||
// Send ICW1
|
||||
outportb(0x20, 0x11);
|
||||
outportb(0xA0, 0x11);
|
||||
|
||||
// send ICW2
|
||||
outportb(0x21, pic1); // remap pics
|
||||
outportb(0xA1, pic2);
|
||||
|
||||
// send ICW3
|
||||
outportb(0x21, 4);
|
||||
outportb(0xA1, 2);
|
||||
|
||||
// Send ICW4
|
||||
outportb(0x21, 0x01);
|
||||
outportb(0xA1, 0x01);
|
||||
|
||||
outportb(0x21, 0x00);
|
||||
}
|
||||
6
Kernel/hal/cpu/pic.h
Normal file
6
Kernel/hal/cpu/pic.h
Normal file
@@ -0,0 +1,6 @@
|
||||
#ifndef _PIC_H
|
||||
#define _PIC_H
|
||||
|
||||
extern void PicRemap(int pic1, int pic2);
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user