[GOOD] BUILD 0.1.0.450 DATE 8/29/2011 AT 10:30 AM

====================================================
+ Changed 'align 0x4' line above multiboot header in loader.asm to
'align 4'
+ Removed -e option for echo in build.sh
+ Modified build.sh for linux
+ Fixed triple fault when enabling paging
+ Fixed page faults at memory manager initialization
+ Fixed 'mem' console function
+ Added more info about page fault at crash screen
+ Added Panic() macro
+ Added verbose mode for memory manager

[ BAD] BUILD 0.1.0.390 DATE 8/27/2011 AT 10:54 PM
====================================================
+ Added stdlib routines, separated in different files
+ Rewritten physical memory manager
+ Added virtual mem manager
+ Added memory allocation/freeing
+ Added memory library
+ Added temporary allocation (at end of kernel), until paging is started
- Removed functionality from debug console function 'mem'
- Removed system.h, the one remaining function now in stdio.h
This commit is contained in:
2021-09-14 18:48:57 +03:00
parent b6ddeca1c3
commit 913e65b856
326 changed files with 6990 additions and 12229 deletions

111
Kernel/drivers/dma/dma.c Normal file
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/*
* dma.c
*
* Created on: Aug 20, 2011
* Author: Tiberiu
*/
#include <stdio.h>
#include "dma.h"
void DmaSetAddress (uint8 channel, uint8 low, uint8 high)
{
uint16 port = 0;
switch (channel)
{
case 0: port = DmaRegisterChannel0Address; break;
case 1: port = DmaRegisterChannel1Address; break;
case 2: port = DmaRegisterChannel2Address; break;
case 3: port = DmaRegisterChannel3Address; break;
case 4: port = DmaRegisterChannel4Address; break;
case 5: port = DmaRegisterChannel5Address; break;
case 6: port = DmaRegisterChannel6Address; break;
case 7: port = DmaRegisterChannel7Address; break;
default: return;
}
outportb(port, low); iowait();
outportb(port, high);
}
void DmaSetCount (uint8 channel, uint8 low, uint8 high)
{
uint16 port = 0;
switch (channel)
{
case 0: port = DmaRegisterChannel0Count; break;
case 1: port = DmaRegisterChannel1Count; break;
case 2: port = DmaRegisterChannel2Count; break;
case 3: port = DmaRegisterChannel3Count; break;
case 4: port = DmaRegisterChannel4Count; break;
case 5: port = DmaRegisterChannel5Count; break;
case 6: port = DmaRegisterChannel6Count; break;
case 7: port = DmaRegisterChannel7Count; break;
default: return;
}
outportb(port, low); iowait();
outportb(port, high);
}
void DmaSetExternalPageRegisters (uint8 channel, uint8 val)
{
uint16 port = 0;
switch (channel)
{
case 1: port = DmaRegisterChannel1PageAddress; break;
case 2: port = DmaRegisterChannel2PageAddress; break;
case 3: port = DmaRegisterChannel3PageAddress; break;
case 5: port = DmaRegisterChannel5PageAddress; break;
case 6: port = DmaRegisterChannel6PageAddress; break;
case 7: port = DmaRegisterChannel7PageAddress; break;
default: return;
}
outportb(port, val);
}
void DmaResetFlipFlop (uint8 channel)
{
uint16 port = (channel < 4) ? DmaRegisterFlipFlopReset : 2*DmaRegisterFlipFlopReset+0xC0;
outportb(port, 0);
}
void DmaReset ()
{
outportb(DmaRegisterMasterReset, 0);
}
void DmaUnmaskAll()
{
outportb(DmaRegisterMaskReset, 0);
}
void DmaMaskChannel(uint8 channel)
{
if (channel >= 8) return;
uint16 port = (channel < 4) ? (DmaRegisterSingleChannelMask) : (2*DmaRegisterSingleChannelMask + 0xC0);
outportb(port, channel%4 | 4);
}
void DmaUnmaskChannel (uint8 channel)
{
if (channel >= 8) return;
uint16 port = (channel < 4) ? (DmaRegisterSingleChannelMask) : (2*DmaRegisterSingleChannelMask + 0xC0);
outportb(port, channel%4);
}
void DmaSetMode (uint8 channel, uint8 mode)
{
if (channel >= 8) return;
uint16 port = (channel < 4) ? (DmaRegisterMode) : (2*DmaRegisterMode + 0xC0);
DmaMaskChannel(channel);
outportb(port, (channel%4) | mode );
DmaUnmaskAll();
}

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Kernel/drivers/dma/dma.h Normal file
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/*
* dma.h
*
* Created on: Aug 20, 2011
* Author: Tiberiu
*/
#ifndef DMA_H_
#define DMA_H_
#include <types.h>
enum DmaRegisters
{
DmaRegisterStatus = 0x08,
DmaRegisterCommand = 0x08,
DmaRegisterRequest = 0x09,
DmaRegisterSingleChannelMask = 0x0A,
DmaRegisterMode = 0x0B,
DmaRegisterFlipFlopReset = 0x0C,
DmaRegisterIntermediate = 0x0D,
DmaRegisterMasterReset = 0x0D,
DmaRegisterMaskReset = 0x0E,
DmaRegisterMultichannelMask = 0x0F,
DmaRegisterChannel0Address = 0x00,
DmaRegisterChannel1Address = 0x02,
DmaRegisterChannel2Address = 0x04,
DmaRegisterChannel3Address = 0x06,
DmaRegisterChannel4Address = 0xC0,
DmaRegisterChannel5Address = 0xC4,
DmaRegisterChannel6Address = 0xC8,
DmaRegisterChannel7Address = 0xCC,
DmaRegisterChannel0Count = 0x01,
DmaRegisterChannel1Count = 0x03,
DmaRegisterChannel2Count = 0x05,
DmaRegisterChannel3Count = 0x07,
DmaRegisterChannel4Count = 0xC2,
DmaRegisterChannel5Count = 0xC6,
DmaRegisterChannel6Count = 0xCA,
DmaRegisterChannel7Count = 0xCE,
DmaRegisterChannel1PageAddress = 0x83,
DmaRegisterChannel2PageAddress = 0x81,
DmaRegisterChannel3PageAddress = 0x82,
DmaRegisterChannel5PageAddress = 0x8B,
DmaRegisterChannel6PageAddress = 0x89,
DmaRegisterChannel7PageAddress = 0x8A
};
enum DmaModes
{
DmaModeChannelMask = 0x3,
DmaModeSelfTest = 0,
DmaModeWrite = 0x8,
DmaModeRead = 0x4,
DmaModeAutoReinit = 0x10,
DmaModeDown = 0x20,
DmaModeTransferOnDemand = 0,
DmaModeTransferSingleDma = 0x40,
DmaModeTransferBlockDma = 0x80,
DmaModeTransferCascade = 0xC0
};
extern void DmaSetAddress (uint8 channel, uint8 low, uint8 high);
extern void DmaSetCount (uint8 channel, uint8 low, uint8 high);
extern void DmaSetExternalPageRegisters (uint8 channel, uint8 val);
extern void DmaSetMode (uint8 channel, uint8 mode);
extern void DmaResetFlipFlop (uint8 channel);
extern void DmaReset ();
extern void DmaMaskChannel(uint8 channel);
extern void DmaUnmaskChannel (uint8 channel);
extern void DmaUnmaskAll ();
#endif /* DMA_H_ */